AL103 Revision 1.0
Table 7: MII Interface Port 6 (Continued)
M6TXCLK
158
I
Transmit Clock Input.
25 MHz for 100 Mbit/s and 2.5 MHz for 10 Mbit/s.
M6RXD3
M6RXD2
M6RXD1
M6RXD0
166
164
163
162
I
Receive Data - NRZ data from the transceiver.
For MII interface, signal RX_DV, RX_ER and RX_D0 through
RX_D3 are sampled by the rising edge of RX_CLK.
M6RXDV
M6RXCLK
M6RXER
M6CRS
161
160
159
148
150
I
I
I
I
I
Receive Data Valid.
Receive Clock.
Receive Data Error.
Carrier Sense.
M6COL
Collision Detect.
Table 8: MII Interface Port 7
PIN
NAME
PIN
NUMBER
I/O
DESCRIPTION
M7TXD3
M7TXD2
M7TXD1
M7TXD0
174
175
176
178
O
Transmit Data - NRZ data to be transmitted to transceiver.
Signal TX_EN and TXD0 through TX_D3 are clocked out by
the rising edge of TX_CLK.
M7TXEN
179
O
I
Transmit Enable.
Synchronous to the transmit clock.
M7TXCLK
180
Transmit Clock Input.
25 MHz for 100 Mbit/s and 2.5 MHz for 10 Mbit/s.
M7RXD3
M7RXD2
M7RXD1
M7RXD0
188
186
185
184
I
Receive Data - NRZ data from the transceiver.
For MII interface, signal RX_DV, RX_ER and RX_D0 through
RX_D3 are sampled by the rising edge of RX_CLK.
M7RXDV
M7RXCLK
M7RXER
M7CRS
183
182
181
170
172
I
I
I
I
I
Receive Data Valid.
Receive Clock.
Receive Data Error.
Carrier Sense.
M7COL
Collision Detect.
9/00
Reference Only / Allayer Communications
11
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