Ai339
1.4 Pin Arrangement
VOUT
NC
NC GND Vφ1
Vφ2 Vφ3
Vφ4
8
7
5
4
3
2
1
6
PD
HCCD
14
10
11
12
13
15
16
9
VDD GND VSUB
VRG NC Hφ1 Hφ2
PT
1.5 Pin Descriptions
Pin
1
Symbol
ΦV4
ΦV3
ΦV2
ΦV1
GND
NC
Description
Pin
Symbol
VDD
GND
ΦSUB
PT
Description
Output amplifier drain bias
Ground
Vertical register transfer clock 4
Vertical register transfer clock 3
Vertical register transfer clock 2
Vertical register transfer clock 1
Ground
9
2
10
11
12
13
14
15
16
Substrate (Overflow drain) bias
Protection bias
3
4
Reset gate clock
5
ΦRG
NC
No connection
No connection
6
No connection
Horizontal register transfer clock 1
Horizontal register transfer clock 2
7
NC
ΦH1
ΦH2
CCD output signal
8
VO
1.6 Absolute Maximum Ratings
Relative to GND
(Unit : V)
Symbols
Min.
- 0.2
- 7.5
Max.
15.0
0.2
VDD
PT
GND
Reference
12.0
29.0
5.0
ΦRG
- 0.2
- 0.2
ΦSUB
ΦH1, ΦH2
ΦV1
- 0.2
- 7.0
- 7.0
- 0.2
14.0
7.0
ΦV2, ΦV3, ΦV4
VO
15.0
A1 PROs Co., Ltd.
Professional Promotion Process Profit
2
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