TABLE I. Electrical performance characteristics - Continued.
Conditions
-55°C ≤ TC ≤ +125°C
SS = 0 V, 4.5 V < VCC < 5.5 V,
Group A
subgroups
Device
type
Limits
Unit
Test
Symbol
V
unless otherwise specified 1/
Min
-10
Max
IOE
VH = 13 V
1, 2, 3
All
100
µA
OE high leakage
(chip erase)
Input capacitance
Output capacitance
Read cycle time
CI
VI = 0 V, VCC = 5.0 V,
TA = +25°C, f = 1 MHz,
see 4.3.1c 3/ 4/
4
All
All
10
10
pF
pF
ns
CO
VO = 0 V, VCC = 5.0 V,
TA = +25°C, f = 1 MHz,
see 4.3.1c 3/ 4/
4
tAVAV
See figure 4 5/
9, 10, 11
01, 02
03, 04
05
120
90
70
Address access time
tAVQV
9, 10, 11
9, 10, 11
01, 02
03, 04
05
120
90
ns
ns
70
Chip enable
access time
tELQV
01, 02
03, 04
05
120
90
70
Output enable access
tOLQV
9, 10, 11
9, 10, 11
01, 02
50
ns
ns
03, 04,
05
40
Chip enable to output
in low Z 4/
tELQX
All
10
See footnotes at end of table.
SIZE
STANDARD
5962-88634
MICROCIRCUIT DRAWING
A
REVISION LEVEL
F
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
5
DSCC FORM 2234
APR 97
XICOR [ XICOR INC. ]
