TABLE I. Electrical performance characteristics - Continued.
Conditions
-55°C ≤ TC ≤ +125°C
SS = 0 V, 4.5 V < VCC < 5.5 V,
Group A
subgroups
Device
type
Limits
Unit
Test
Symbol
V
unless otherwise specified 1/
Min
12
Max
High voltage
VH
See figure 4 5/
9, 10, 11
9, 10, 11
9, 10, 11
All
All
All
13
V
Chip erase
tWLWH2
tWLWH1
210
ms
ms
10
WE pulse width for
chip erase
1/ DC and read mode.
2/ Connect all address inputs and OE to VIH and measure IOLZ and IOHZ with the output under test connected to VOUT
3/ All pins not being tested are to be open.
.
4/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the
limits specified in table I.
5/ Tested by application of specified timing signals and conditions, including:
Equivalent ac test conditions for all device types:
Output load: 1 TTL gate and CL = 100 pF (minimum) or equivalent circuit.
Input rise and fall times < 10 ns.
Timing measurements reference levels:
Inputs 1.0 V and 2.0 V.
Input pulse levels: 0.4 V and 2.4 V.
Outputs 0.8 V and 2.0 V.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535,
appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with
each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
reviewer.
3.10 Processing EEPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the
manufacturer prior to delivery.
3.10.1 Erasure of EEPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics
specified by the manufacturer.
3.10.2 Programmability of EEPROMS. When specified, devices shall be programmed to the specified pattern using the
procedures and characteristics specified by the manufacturer and shall be made available upon request.
3.10.3 Verification of erasure or programmability of EEPROMS. When specified, devices shall be verified as either
programmed to the specified pattern or erased. As a minimum, verification shall consist of performing a read of the entire array
to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure,
and shall be removed from the lot or sample.
SIZE
STANDARD
5962-88634
MICROCIRCUIT DRAWING
A
REVISION LEVEL
F
SHEET
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
8
DSCC FORM 2234
APR 97
XICOR [ XICOR INC. ]
