74HC595
GENERAL DESCRIPTION
8-Bit Shift Registers W ith Latched 3-State Output
74HC595
is fabricated with high-speed silicon
gate CMOS technology. It contains an 8-bit
serial-in, serial or parallel-out shift register and an
8-bit D-type storage register with parallel 3-state
outputs. The shift and storage register have
independent clock inputs. Both the shift register
clock (SRCK) and storage register clock (RCK)
are positive-edge triggered.
The shift register has a direct overriding clear
input (SRCL), serial data input (SER), and serial
outputs for cascading. When the output-enable
(OE) input is high, the outputs are in the
high-impedance state. If both clocks are
connected together, the shift register always is
one clock pulse ahead of the storage register.
FEATURES
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8-bit serial-in, parallel-out shift register with storage
Shift register has direct clear
8-bit D-type storage register with parallel 3-state outputs
Two independent clocks for shift and storage register
Wide operating power supply voltage 2-6V
Low input current < 1µA
Low power consumption, Max. 80µA (74HC595)
Output driving capacity ± 6 mA at 5V
Typical propagation delay 13nS
LOGIC DIAGRAM
Q
1
15
Q
2
1
Q
3
2
Q
4
3
Q
5
4
Q
6
5
Q
7
6
Q
8
7
13
OE
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
3R
C3
3S
12
RCK
11
SRCK
14
SER
10
1D
C1
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
2S
2R
C2
R
9
Q
8’
SRCL
1