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FEN30GP 参数 Datasheet PDF下载

FEN30GP图片预览
型号: FEN30GP
PDF下载: 下载PDF文件 查看货源
内容描述: [30.0 Ampere Heatsink Dual Common Anode Ultra Fast Recovery Half Bridge Rectifiers]
分类和应用:
文件页数/大小: 52 页 / 461 K
品牌: WINBOND [ WINBOND ]
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W19B(L)320ST/B  
6. FUNCTIONAL DESCRIPTION  
6.1 Device Bus Operation  
6.1.1 Word/Byte Configuration  
The #BYTE pin controls the device data I/O pins operate whether in the byte or word configuration.  
When the #BYTE pin is ‘1’, the device is in word configuration; DQ0DQ15 are active and controlled  
by #CE and #OE.  
When the #BYTE pin is ‘0’, the device is in byte configuration, and only data I/O pins DQ0DQ7 are active  
and controlled by #CE and #OE. The data I/O pins DQ8DQ14 are tri-stated, and the DQ15 pin is  
used as an input for the LSB (A-1) address function.  
6.1.2 Reading Array Data  
To read array data from the outputs, the #CE and #OE pins must be set to VIL. #CE is the power  
control and used to select the device. #OE is the output control and gates array data to the output  
pins. #WE should stay at VIH. The #BYTE pin determines the device outputs array data whether in  
words or bytes.  
The internal state machine is set for reading array data when device power-up, or after a hardware  
reset. This ensures that no excess modification of the memory content occurs during the power  
transition. In this mode there is no command necessary to obtain array data. Standard microprocessor  
read cycles that assert valid addresses on the device address inputs produce valid data on the device  
data outputs. The device remains enabled for read access until the command register contents are  
changed.  
6.1.3 Writing Commands/Command Sequences  
In writhing a command or command sequence (which includes programming data to the device and  
erasing sectors of memory), the system must drive #WE and #CE to VIL, and #OE to VIH.  
For program operations, the #BYTE pin determines the device accepts program data whether in bytes  
or in words. Refer to “Word/Byte Configuration” for more information.  
The Unlock Bypass mode of device is to facilitate a faster programming. When the device enters into  
the Unlock Bypass mode, only two write cycles are required to program a word or byte. Please refer to  
"Word/Byte Configuration” section for details on programming data to the device using both standard  
and Unlock Bypass command sequences.  
The erase operation can erase a sector, multiple sectors, even the entire device. The “sector address”  
is the address bits required to solely select a sector.  
Accelerated Program Operation  
The device provides accelerated program operations through the ACC function. This is one of two  
functions provided by the #WP/ACC pin. This function is primarily intended to allow a faster  
manufacturing throughput in the factory.  
If #WP/ACC pin is set at VHH, the device automatically enters into the Unlock Bypass mode. Then the  
device will temporarily unprotect any protected sectors, and uses the higher voltage on this pin to  
reduce the time required for program operations. The system would use a two-cycle program  
command sequence required by the Unlock Bypass mode. When VHH is removed from the #WP/ACC  
pin, the device is back to a normal operation.  
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