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FEN30GP 参数 Datasheet PDF下载

FEN30GP图片预览
型号: FEN30GP
PDF下载: 下载PDF文件 查看货源
内容描述: [30.0 Ampere Heatsink Dual Common Anode Ultra Fast Recovery Half Bridge Rectifiers]
分类和应用:
文件页数/大小: 52 页 / 461 K
品牌: WINBOND [ WINBOND ]
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W19B(L)320ST/B  
8.3 DC Characteristics  
8.3.1 CMOS Compatible  
LIMITS  
PARAMETER  
SYM.  
TEST CONDITIONS  
UNIT  
MIN. TYP. MAX.  
Input Load Current  
ILI VIN =VSS to VDD, VDD = VDD (Max.)  
ILIT VDD = VDD (Max.), A9 = 12.5 V  
-
-
-
-
-
-
-
±3.0  
35  
35  
±1.0  
16  
4
µA  
µA  
A9 Input Load Current  
#RESET Input Load Current  
Output Leakage Current  
ILR VDD = VDD (Max.), #RESET = 12.5 V  
ILO VOUT =VSS to VDD, VDD =VDD (Max.)  
-
µA  
-
µA  
5 MHz  
1 MHz  
5 MHz  
1 MHz  
10  
2
mA  
mA  
mA  
mA  
mA  
#CE = VIL, #OE = VIH  
Byte Mode  
VDD Active Read Current (Note 1, 2)  
ICC1  
10  
2
16  
4
#CE = VIL, #OE = VIH  
Word Mode  
VDD Active Write Current (Note 2, 3)  
VDD Standby Current (Note 2)  
VDD Reset Current (Note 2)  
ICC2  
ICC3  
ICC4  
-
-
-
15  
0.2  
0.2  
45  
5
#CE = VIL, #OE = VIH, #WE = VIL  
#CE, #RESET = VDD ±0.3V  
#RESET = VSS ±0.3V  
µA  
µA  
5
Automatic Sleep Mode Current  
(note 2, 4)  
Input Low Voltage  
ICC5  
-
0.2  
5
VIH = VDD ±0.3V, VIL = VSS ± 0.3V  
µA  
V
VIL  
-
-
-0.5  
-
-
0.8  
0.7 x  
VDD  
VDD  
Input High Voltage  
VIH  
V
+0.3  
Voltage for Autoselect and Temporary  
VDD = 3.0V ±10% (W19B320S) or  
VDD = 3.3V ±10% (W19L320S)  
Sector protect/ Unprotect and Program VHH  
Acceleration  
8.5  
-
9.5  
V
Voltage for Autoselect and Temporary  
VDD = 3.0V ±10% (W19B320S) or  
VDD = 3.3V ±10% (W19L320S)  
VID  
8.5  
-
-
-
-
12.5  
0.45  
-
V
V
V
Sector Unprotected  
Output Low Voltage  
VOL IOL = 4.0 mA, VDD = VDD (Min.)  
0.85 x  
VDD  
VOH1 IOH = -2.0 mA, VDD = VDD (Min.)  
Output High Voltage  
VDD-  
0.4  
VOH2  
-
-
IOH = -100 µA, VDD = VDD (Min.)  
Notes:  
1. The ICC current listed is typically less than 2 mA/MHz, with #OE at VIH.  
2. Maximum ICC specifications are tested with VDD = VDD max.  
3.  
ICC active while Embedded Erase or Embedded Program is in progress.  
4. Automatic sleep mode enables the low power mode when addresses remain stable for tACC + 30 nS. Typical sleep mode  
current is 200 nA.  
Publication Release Date: March 23, 2004  
- 37 -  
Revision A2  
 
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