BRIGHT
Microelectronics
Inc.
FEATURES
•
Preliminary BM29F040
5.0 V +/- 10% Program and Erase
−
Minimizes system power consumption
−
Simplifies the system design
•
Sector Erase architecture
−
8 Equal sectors of 64K bytes each
−
Any combination of multiple Sector Erase
−
Full Chip Erase
•
Compatible with JEDEC standard commands
−
Uses same software commands as
EEPROMs
•
Sector Protection
−
Any number of sectors can be protected from
Program and Erase operation
•
Compatible with JEDEC-standard byte wide
pinout
−
32 pin PLCC/TSOP
−
32 pin DIP
•
•
•
Low Power Consumption
Typically 100,000 Program/Erase cycles
Erase Suspend and Resume
−
Suspend the Sector Erase Operation to
allow a READ in another sector
•
Automated sector/chip Erase Algorithms
−
No programming before Erase needed
−
Internal program and Erase Margin Check
•
•
Low Vcc Write inhibit
<
3.2 volts
Single Cycle reset command
•
Data Polling and Toggle Bit
−
useful for detection of Program and Erase
cycle completion
Product Selection Guide
FAMILY PART NO.
Maximum Access Time (nS)
CE (E) Access time (nS)
OE (G) Access time (nS)
-75*
70
70
30
Table 1
-90
90
90
35
-120
120
120
50
-150
150
150
60
*This speed is available with Vcc = 5V +/- 5% variation
-2-
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