BRIGHT
Microelectronics
Inc.
Preliminary BM29F040
4 MEGABIT (512K
×
8)
5 VOLT SECTOR ERASE CMOS FLASH MEMORY
GENERAL DESCRIPTION
The BM29F040 is a 4 Megabit, 5.0 Volts only Flash memory device organized as 512K
×
8 bits each.
The BM29F040 is offered in an Industry standard 32-pin package which is backward compatible to 1
Megabit and also pin compatible to EEPROMs. The device is offered in PDIP, PLCC and TSOP
packages. The device is designed to be programmed and erased in system with the standard system
5 Volt Vcc supply. An external 12.0 Volts Vpp is not required for program and erase operation. The
device can also be reprogrammed in standard EPROM programmers.
The BM29F040 offers access times between 70 to 150 nS. The device has separate chip enable
( CE ), write enable (
WE
) and output enable ( OE ) controls to eliminate bus contention.
BMI flash memory technology reliably stores memory information even after 100,000 erase and
program cycles. The BMI proprietary cell technology enhances the programming speeds and
eliminates over erase problems seen in the classical ETOX
™
type of Flash cell technologies. The
combination of cell technology and internal circuit design techniques give reduced internal electrical
fields and this provides improved reliability and endurance. The BM29F040 is entirely pin and
command set compatible to the JEDEC standard 4 Megabit EEPROM. The commands are written to
the Command State machine using standard microprocessor write timings. The internal Programming
and Erase Algorithms are automatically implemented based on the input commands.
The BM29F040 is programmed by executing the program command sequence. This will start the
internal automatic program Algorithm that times the program pulse width and also verifies the proper
cell margin. Erase is accomplished by executing the erase command sequence. The internal Power
Switching State Machine automatically executes the algorithms and generates the necessary voltages
and timings for the erase operation. The program and erase verify is also done internally and proper
margin testing is automatically performed. This scheme unburdens the microprocessor or
microcontroller from generating the program and erase algorithms by controlling all the necessary
timings and voltages. The entire memory is typically erased in 1.5 seconds. No preprogramming is
necessary in this technology.
The BM29F040 also features a sector erase architecture. It is divided into 8 sectors of 64K bytes
each. Each sector can be erased individually without affecting the data in other sectors or they can be
erased in a random combination of groups. This multiple sector erase capability or full chip erase
makes it very flexible to alter the data in BM29F040. To protect the data from accidental program or
erase the device also has a sector protect or multiple sector protect function.
The device features a single 5 Volt power supply for read, program and erase operation. Internally
generated and well regulated voltages are provided for the program and erase operation. A low Vcc
detector inhibits write operations during power transitions. The end of program or erase is detected by
Data polling of DQ7 or by the Toggle Bit feature on DQ6. Once the program or erase cycle has been
successfully completed, the device internally resets to Read mode.
A Winbond Company
-1-
Publication Release Date: June 1999
Revision A1
WINBOND [ WINBOND ]
