Preliminary
VG3617161DT
16Mb CMOS Synchronous Dynamic RAM
VIS
Capacitance
(Ta=25°C,f=1MHZ)
Parameter
Symbol
C11
Typ
2.5
Max
4
Unit
pF
Input capacitance(CLK)
Input capacitance(all input pins except data
pins)
C12
CI/O
2.5
4.0
5
pF
pF
Data input/output capacitance
6.5
Recommended D.C. Operating Conditions (V = 3.3V ± 0.3V, Ta = 0 ~ 70°C)
DD
-5.5
-6
-7
-8
Unit Note
Description/test condition
Symbol
Min. Max. Min. Max. Min. Max. Min. Max.
Operating Current
³ t , Outputs Open
I
190
185
165
145
3,4
DD1
t
RC
RC(min )
Address changed once during t
.
CK(min)
Burst Length = 1 (One Bank Active)
Precharge Standby Current in non power-down mode
= t , CS ³ V , CKE ³ V
I
95
45
85
40
75
35
65
30
3
DD2N
t
CK
CK(min)
(min)
(min)
IH
IH
Input signals are changed once during 30ns.
Precharge Standby Current in non power-down mode
I
DD2NS
t
= ¥ , CKE ³ VIH
, CLK £ V
(min)
IL
CK
(max)
mA
Input signals are stable
Precharge Standby Current in power-down mode
= t (min), CKE £ V
I
4
4
4
4
3
DD2P
t
CK
CK
(max)
IL
Precharge Standby Current in power-down mode
= ¥ , CKE £ V
, CLK £ V
I
3.5
3.5
3.5
3.5
DD2PS
t
CK
(max)
(max)
IL
IL
Active Standby Current in non power down mode
CKE ³ VIH , t = t (Both Bank Actioe)
I
85
6
75
6
65
6
55
6
3
DD3N
(min) CK
CK(min)
Active Standby Current in power-down
CKE £ VIL , t , CS ³ V
I
DD3P
t
(Both
IH(min)
(max) CK = CK(min)
Bank Active)
Operating Current (Page Burst, and All Bank activated)
= t , Outputs Open, Multi-bank interleave,
I
195
185
175
165
4,5
3
DD4
t
CCD
CCD(min)
gapless data
Refresh Current
I
I
185
4
175
4
165
4
155
4
DD5
tRC ³ tRC
(t
= 64ms)
(min) REF
Self Refresh Current
DD6
CKE £ 0.2V
Document:1G5-0160
Rev.1
Page 5
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
