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CHK080A-SRA 参数 Datasheet PDF下载

CHK080A-SRA图片预览
型号: CHK080A-SRA
PDF下载: 下载PDF文件 查看货源
内容描述: 80W功率封装晶体管 [80W Power Packaged Transistor]
分类和应用: 晶体晶体管
文件页数/大小: 14 页 / 577 K
品牌: UMS [ UNITED MONOLITHIC SEMICONDUCTORS ]
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80W Power Packaged Transistor  
CHK080A-SRA  
RF Characteristics (Pulsed)  
Tcase= +25°C, Pulsed mode (1), F=3GHz, VD=50V, ID_Q=600mA (ID_Q =300mA on each transistor)  
Symbol  
GSS  
Parameter  
Small Signal Gain  
Min  
15  
Typ  
17  
Max  
Unit  
dB  
W
PSAT  
Saturated Output Power  
80  
100  
65  
PAE  
Max Power Added Efficiency  
55  
%
GPAE_MAX Associated Gain at Max PAE  
13  
dB  
(1) Input RF and gate voltage are pulsed. Conditions are 25µs width, 10% duty cycle and 1µs  
offset between DC and RF pulse.  
These values are the intrinsic performance of the packaged device. They are deduced from  
measurements and simulations. They are considered in the reference plane defined by the  
leads of the package, at the connection interface with the PCB. The typical performance  
achievable in more than 20% frequency band around 3GHz was demonstrated using the  
reference board 61500192 presented hereafter.  
Absolute Maximum Ratings  
Tcase= +25°C(1), (2), (3)  
Symbol  
VDS  
Parameter  
Drain-Source Voltage  
Rating  
60  
Unit  
V
Note  
(6)  
VGS_Q  
IG_MAX  
IG_MIN  
ID_MAX  
PIN  
Gate-Source Voltage  
-10, +2  
150  
V
Maximum Gate Current in forward mode  
Maximum Gate Current in reverse mode  
Maximum Drain Current  
mA  
mA  
A
-12  
(4)  
(5)  
12  
Maximum Input Power (typical)  
Junction Temperature  
41  
dBm  
°C  
Tj  
220  
TSTG  
TCase  
Storage Temperature  
-55 to +150  
See note  
°C  
(4)  
Case Operating Temperature  
°C  
(1) Operation of this device above anyone of these parameters may cause permanent  
damage.  
(2) Duration < 1s.  
(3) The given values must not be exceeded at the same time even momentarily for any  
parameter, since each parameter is independent from each other, otherwise deterioration or  
destruction of the device may take place.  
(4) Max junction temperature must be considered  
(5) @3GHz - Linked to and limited by IG_MAX & IG_MIN values  
(6)  
V
GS_Q  
max limited by ID_MAX and IG_MAX values  
Ref. : DSCHK080A-SRA3148 - 28 Jun 13  
3/14  
Specifications subject to change without notice  
Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France  
Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34