THC63LVD103 _Rev2.2
Pin Description
Pin Name
TA+, TA-
Pin #
30, 31
Type
LVDS OUT
LVDS OUT
LVDS OUT
LVDS OUT
LVDS OUT
LVDS OUT
IN
Description
TB+, TB-
28, 29
TC+, TC-
24, 25
LVDS Data Out.
LVDS Clock Out.
Pixel Data Inputs.
TD+, TD-
20, 21
TE+,TE-
18, 19
TCLK+, TCLK-
TA0 ~ TA6
TB0 ~ TB6
TC0 ~ TC6
TD0 ~ TD6
TE0 ~ TE6
22, 23
33,34,35,36,37,38,40
41,42,44,45,46,48,49
50,52,53,54,55,57,58
59,61,62,63,64,1,3
4,5,6,8,9,11,16
IN
IN
IN
IN
H: Normal operation,
/PDWN
13
IN
IN
L: Power down (all outputs are Hi-Z)
LVDS swing mode, VREF select.
LVDS
Swing
Small Swing
Input Support
RS
VCC
0.6 ~ 1.4V
GND
350mV
350mV
200mV
N/A
RS=VREFa
N/A
RS
43
a. VREF is Input Reference Voltage.
Input Clock Triggering Edge Select.
H: Rising edge, L: Falling edge
R/F
60
IN
Power Supply Pins for TTL inputs and digital
circuitry.
VCC
51, 7
Power
CLKIN
GND
12
IN
Clock in.
2, 10, 39, 47, 56
Ground
Power
Ground
Power
Ground
Ground Pins for TTL inputs and digital circuitry.
Power Supply Pins for LVDS Outputs.
Ground Pins for LVDS Outputs.
Power Supply Pin for PLL circuitry.
Ground Pins for PLL circuitry.
LVDS VCC
LVDS GND
PLL VCC
PLL GND
27
17, 26, 32
15
14
Copyright 2001-2006 THine Electronics, Inc. All rights reserved.
3
THine Electronics, Inc.
THINE [ THINE ELECTRONICS, INC. ]
