THC63LVD103 _Rev2.2
Switching Characteristics
V
= 3.0V ~ 3.6V, Ta = 0°C ~ +70°C
CC
Symbol
Parameter
Min.
Typ.
Max.
5.0
Units
ns
t
CLK IN Transition time
CLK IN Period
TCIT
t
7.4
125.0
ns
TCP
t
0.35t
0.5t
0.65t
CLK IN High Time
ns
TCH
TCP
TCP
TCP
TCP
TCP
TCP
t
0.35t
0.5t
3t
0.65t
CLK IN Low Time
ns
TCL
t
CLK IN to TCLK+/- Delay
TTL Data Setup to CLK IN
TTL Data Hold from CKL IN
LVDS Transition Time
Output Data Position0
ns
TCD
TCP
t
2.5
ns
TS
t
0
ns
TH
t
0.6
0.0
1.5
+0.2
ns
LVT
t
-0.2
ns
TOP1
tTCP
tTCP
tTCP
t
Output Data Position1
Output Data Position2
Output Data Position3
Output Data Position4
Output Data Position5
ns
ns
ns
ns
ns
----------
7
---------- + 0.2
7
---------- – 0.2
7
TOP0
tTCP
tTCP
2----------
7
tTCP
t
2---------- – 0.2
7
2---------- + 0.2
7
TOP6
tTCP
tTCP
3----------
7
tTCP
t
3---------- – 0.2
7
3---------- + 0.2
7
TOP5
tTCP
tTCP
4----------
7
tTCP
t
4---------- – 0.2
7
4---------- + 0.2
7
TOP4
tTCP
tTCP
5----------
7
tTCP
t
5---------- – 0.2
7
5---------- + 0.2
7
TOP3
tTCP
tTCP
6----------
7
tTCP
t
Output Data Position6
Phase Lock Loop Set
ns
6---------- – 0.2
7
6---------- + 0.2
7
TOP2
t
10.0
ms
TPLL
AC Timing Diagrams
TTL Input
90%
10%
90%
10%
CLK IN
tTCIT
tTCIT
LVDS Output
V
diff=(TA+)-(TA-)
80%
20%
80%
20%
V
TA+
diff
5pF
100Ω
TA-
LVDS Output Load
tLVT
tLVT
Copyright 2001-2006 THine Electronics, Inc. All rights reserved.
8
THine Electronics, Inc.
THINE [ THINE ELECTRONICS, INC. ]
