78Q8430 Data Sheet
DS_8430_001
7.6.3 Transmit Packet Status Register ...................................................................................59
7.6.4 Transmit Producer Status..............................................................................................60
7.6.5 Receive Producer Status...............................................................................................60
7.6.6 Revision ID.....................................................................................................................61
7.6.7 Configuration..................................................................................................................61
7.6.8 Receive to Transmit Transfer Register..........................................................................61
7.6.9 Frame Disposition Register ...........................................................................................61
7.6.10 Receive FIRST BLOCK Status Register .......................................................................61
7.6.11 Receive Data Status Register........................................................................................62
7.6.12 BIST Control Register....................................................................................................62
7.6.13 BIST Bypass Mode Data Register.................................................................................63
7.6.14 Station Management Data Register ..............................................................................63
7.6.15 Station Management Control and Address Register.....................................................63
7.6.16 PROM Data Register.....................................................................................................63
7.6.17 PROM Control Register.................................................................................................64
7.6.18 MAC Control Register....................................................................................................64
7.6.19 Count Data Register ......................................................................................................65
7.6.20 Counter Control Register...............................................................................................65
7.6.21 Counter Management Register......................................................................................66
7.6.22 Snoop Control Register .................................................................................................66
7.6.23 Interrupt Delay Count Register ......................................................................................66
7.6.24 Pause Delay Count Register .........................................................................................66
7.6.25 Host Not Responding Count Register ...........................................................................67
7.6.26 Wake Up Status Register ..............................................................................................67
7.6.27 Water Mark Values Register..........................................................................................67
7.6.28 Power Management Capabilities...................................................................................67
7.6.29 Power Management Control and Status Register.........................................................68
7.6.30 CAM Address Register ..................................................................................................68
7.6.31 Rule Match Register ......................................................................................................69
7.6.32 Rule Control Register ....................................................................................................69
7.6.33 Que Status Interrupt Register........................................................................................70
7.6.34 Que Status Mask Register.............................................................................................70
7.6.35 Overflow/Underrun Interrupt Register............................................................................71
7.6.36 Overflow/Underrun Mask Register.................................................................................71
7.6.37 Transmit RMON Interrupt Register................................................................................71
7.6.38 Transmit RMON Mask Register.....................................................................................72
7.6.39 Receive RMON Interrupt Register.................................................................................72
7.6.40 Receive RMON Mask Register......................................................................................72
7.6.41 Host Interrupt Register...................................................................................................72
7.6.42 Host Interrupt Mask Register.........................................................................................73
7.7 PHY Management Registers .....................................................................................................74
7.7.1 PHY Register Overview.................................................................................................74
7.7.2 PHY Control Register – MR0.........................................................................................75
7.7.3 PHY Status Register – MR1 ..........................................................................................76
7.7.4 PHY Identifier Registers – MR2, MR3...........................................................................77
7.7.5 PHY Auto-Negotiation Advertisement Registers – MR4 ...............................................77
7.7.6 PHY Auto-Negotiation Line Partner Ability Register – MR5..........................................78
7.7.7 PHY Auto-Negotiation Expansion Register – MR6........................................................78
7.7.8 PHY Vendor Specific Register – MR16.........................................................................79
7.7.9 PHY Interrupt Control / Status Register – MR17...........................................................80
7.7.10 PHY Transceiver Control Register – MR19...................................................................80
7.7.11 PHY Diagnostic Register – MR18..................................................................................81
7.7.12 PHY LED Configuration Register – MR23.....................................................................81
7.7.13 PHY MDI / MDIX Control Register – MR24...................................................................82
8
9
Isolation Transformers.....................................................................................................................83
Reference Crystal .............................................................................................................................83
10 System Bus Interface Schematic ....................................................................................................84
11 Line Interface Schematic..................................................................................................................85
4
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
