78P2241B
E3/DS3/STS-1
Transceiver
RCLK/TCLK polarity reversal:
FUNCTIONAL DESCRIPTION (continued)
To simplify the interface with framer circuitry, RCLK
and TCLK can be inverted with the ICKP pin.
The decoder also detects Receive Line Code
Violations (RLCV) and outputs a pulse via the
RNEG/RLCV pin. Three different classes of line code
violations are detected.
Pin 10
ICKP
Low
RCLK
TCLK
1) Too many zeros: More than two (three)
consecutive zeros in B3ZS (HDB3) mode.
Normal
Invert
Normal
Invert
Invert
Float
High
2) Not enough zeros between bipolar pulse (B) and
bipolar violation pulse (V): (B,V) for B3ZS, (B,V)
or (B,0,V) for HDB3.
Normal
Loop-back modes:
3) Code violation: Even number of bipolar pulses
(B) detected between bipolar violation pulses (V).
The following loop-back modes allow for the
diagnostic test of the PC board. This function is
controlled by the LPBK pin.
On the transmit side, NRZ input data is internally
converted to Positive and Negative logic data
following the B3ZS (for DS3/STS-1) or HDB3 (for E3)
substitution codes. The NRZ data is input to the
TPOS/TNRZ pin as shown below.
Pin 28
LPBK
Low
Float
High
Loop-back
Local loop-back (LLB)
Remote loop-back (RLB)
Normal Operation
Pin 20
ENDEC TPOS/TNRZ
TNEG
High
Low
Positive AMI
NRZ data
Negative AMI
LCV
Local loop-back:
LOSS OF SIGNAL
When LPBK is low, the 78P2241B enters Local
loopback. In this mode, the LOUT+/- transmit signals
are internally routed to the receiver input circuit. The
incoming line receiver AMI signal on LIN+/- is
ignored. With the transmitter still tied to the cable,
this test mode can indicate a short circuit on the
transmitter external components or other problem in
the transmit path.
Should the input signal fall below a minimum value for
175 +/- 75 cycles of the receive clock RCLK, the loss
of signal indication, LOS goes low. LOS goes high
when a valid signal is received at the input for at least
175 +/- 75 cycles of the receive clock.
TRANSMITTER
Remote loop-back:
The transmitter accepts logic level clock (TCLK),
positive data (TPOS) and negative data (TNEG)
signals and generates current pulses on the LOUT+
and LOUT- pins. When properly connected to a
center-tapped 1:2 transformer, an AMI pulse is
When LPBK pin is allowed to float, the 78P2241B
enters remote loopback mode. The RPOS/RNEG
and RCLK pins are internally tied to the
TPOS/TNEG and TCLK so the same AMI signal that
is received by the framer is transmitted back to the
far end where a bit continuity test can be performed.
Line Build-Out:
generated which can drive a 75
Ω coaxial cable.
When the recommended transformer is used and the
E# pin is set high, the transmitted pulse shape at the
end of the 75
fit the DS3 template in ANSI T1.102-1993 and
Telcordia GR-499-CORE standard documents.
Ω terminated cable of 0 to 450 feet will
The Line Build-Out function controls the amplitude in
DS3 and STS-1 mode. The selection of LBO
depends on the amount of cable the transmitter is
connected to. When used with less than 225 ft of
cable the LBO pin should be pulled high. With 225ft
or more cable the LBO pin should be low.
For STS-1 applications, the transmitted pulse for a
short cable meets the requirements of Telcordia
GR-253-CORE. The E# pin should be allowed to
float.
For E3 applications, the transmitted pulse for a short
cable meets the requirements of ITU-T G.703. The
E# pin is to be pulled low.
Page: 3 of 23
©
2005 Teridian Semiconductor Corporation
Rev 5.0
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
