73K222AL
V.22, V.21, Bell 212A, 103
Single-Chip Modem
DATA SHEET
REGISTER DESCRIPTIONS
73K222AL internal state. DR is a detect register
which provides an indication of monitored
modem status conditions. TR, the tone control
register, controls the DTMF generator, answer
and guard tones and RXD output gate used in
the modem initial connect sequence. All
registers are read/write except for DR, which is
read only. Register control and status bits are
identified below:
Four 8-bit internal registers are accessible for control
and status monitoring. The registers are accessed in
read or write operations by addressing the A0, A1
and A2 address lines in serial mode, or the AD0,
AD1 and AD2 lines in parallel mode. In parallel
mode the address lines are latched by ALE. Register
CR0 controls the method by which data is
transferred over the phone line. CR1 controls the
interface between the microprocessor and the
REGISTER BIT SUMMARY
ADDRESS
DATA BIT NUMBER
REGISTER
AD2 - AD0
D7
D6
0
D5
D4
D3
D2
D1
D0
CONTROL
TRANSMIT
TRANSMIT
TRANSMIT
TRANSMIT
ENABLE
ANSWER/
TRANSMIT
MODULATION
OPTION
000
CR0
CR1
DR
REGISTER
0
MODE
2
MODE
1
MODE
0
ORIGINATE
MODE
3
CONTROL
REGISTER
1
TRANSMIT
PATTERN
1
TRANSMIT
PATTERN
0
ENABLE
DETECT
CLK
TEST
MODE
1
TEST
MODE
0
BYPASS
001
010
011
100
101
110
RESET
CONTROL
SCRAMBLER
INTERRUPT
DETECT
UNSCR.
MARKS
CARRIER
DETECT
ANSWER
TONE
CALL
LONG
LOOP
RECEIVE
DATA
X
X
REGISTER
PROGRESS
TONE
RXD
TRANSMIT
GUARD
TONE
TRANSMIT
ANSWER
TONE
TRANSMIT
DTMF
DTMF1/
DTMF0/
GUARD/
TR
DTMF3
DTMF2
CONTROL
REGISTER
OUTPUT
CONTROL
OVERSPEED
ANS TONE
CONTROL
REGISTER
2
X
X
X
X
X
X
X
X
X
CR2
CR3
ID
THESE REGISTER LOCATIONS ARE RESERVED FOR
USE WITH OTHER K-SERIES FAMILY MEMBERS
CONTROL
REGISTER
3
ID
X
X
X
ID
ID
ID
ID
REGISTER
NOTE: When a register containing reserved control
bits is written into, the reserved bits must be
programmed as 0's.
X = Undefined, mask in software
Page: 7 of 27
© 2007 TERIDIAN Semiconductor Corporation
Rev 6.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
