FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
VREF
GNDD GNDA V3P3A V3P3SYS
∆Σ ADC
CONVERTER
V3P3D
VBAT
VBIAS
VBIAS
FIR
CE
PLS_INV
PLS_INTERVAL
PLS_MAXWIDTH
CE_LCTN
EQU
PRE_SAMPS
SUM_CYCLES
RTM
FIR_LEN
IAP
IAN
VADC
22
to TMUX
VOLT
REG
RPULSE
WPULSE
XPULSE
YPULSE
ADC_E
VREF
MUX
VREF
VA
VREF_CAL
VREF_DIS
LCD_ONLY
SLEEP
IBP
IBN
VB
RTM_0..3
RTM_E
CE_E
V2P5
CE_PROG
2.5V to logic
32
EQU
MUX_ALT
MUX_DIV
16
CE_DATA
VBAT
2.5V_NV
XRAM
4kB
MCK
PLL
FLASH
128KB/
256KB
2.5V_NV
RTCLK (32KHz)
DIO_PV
CK_CE
DIO_PW
DIO_PX
DIO_PY
CK_MPU
XIN
OSC
(32KHz)
CKOUT_E
XOUT
DIO47/SEG67...DIO51/SEG71
DIO40/SEG60...DIO45/SEG65
DIO30/SEG50
RTCA_ADJ
5
6
CKTEST
CKOUT_E
RTC
RST_SUBSEC
QREG
PREG
2.5V_NV
DIO29/SEG59
MULTI-
PURPOSE
IO
DIO10/SEG30...DIO27/SEG47
DIO9/SEG29/YPULSE
DIO8/SEG28/XPULSE
DIO7/SEG27/RPULSE
DIO6/SEG26/WPULSE
DIO5/SEG25/SDATA
DIO4/SEG24/SDCK
18
RTC_DAY
TEMP
SENSOR
RTC_HR
RTC_MIN
RTC_SEC
RTC_DATE
RTC_MO
RTC_YR
LCD DISPLAY
DRIVER
TEST
MODE
TEST
LCD_DAC
LCD_MODE
LCD_CLK
LCD_E
COM0..3
COM0...3
MPU
4
4
LCD_BLKMAP
LCD_SEG
LCD_Y
SEG...
DIGITAL I/O
RX
TX
DIO_DIR
DIO_R
DIO
DIO...
UART1
XRAM BUS
8
PCSZ
PCLK
PSI
SPI SLAVE
SPE
PB
PB
PSO
PCMD
EEPROM
SDATA
SCLK
SEG20...SEG23
SEG19/CKTEST
SEG12...SEG18
SEG11/E_RST
SEG10/E_TCLK
SEG9/E_RXTX
SEG8
4
7
DIO_EEX
EEDATA
EECTRL
UART2--OPTICAL
OPT_TX
OPT_RX
OPT_RXDIS
OPT_RXINV
OPT_TXE
OPT_TXE
OPT_TXINV
OPT_TXMOD
OPT_FDC
SEG7/MUX_SYNC
SEG6/PSDI
SEG5/PCSZ
MUX_SYNC_E
NVRAM
SEG4/PSDO
SEG3/PCLK
2.5V_NV
GP0-GP7
SEG0...SEG2
3
3
IRAM BUS
8
E_RXTX
E_TCLK
E_RSTZ
EMULATOR
DIO56...DIO58
DIO3
IRAM
256B
DIO2/OPT_TX/WPULSE/RPULSE
DIO1/OPT_RX
ICE_E
FAULTZ
POWER FAULT
V1
TEST
MUX
TMUXOUT
TMUX[4:0]
02/18/2009
RESET
ICE_E
Figure 2: 71M6532D/F IC Functional Block Diagram
v1.2
© 2005-2009 TERIDIAN Semiconductor Corporation
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