FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
A
B
A
B
A
Voutp
Vinp
Vinn
+
-
B
A
G
Voutn
B
CROSS
Figure 3: General Topology of a Chopped Amplifier
It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as con-
trolled by CROSS, in the A position, the output voltage is:
Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff
With all switches set to the B position by applying the inverted CROSS signal, the output voltage is:
Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or
Voutp – Voutn = G (Vinp – Vinn) - G Voff
Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the
output as positive and negative, which results in the offset effectively being eliminated, regardless of its
polarity or magnitude.
When CROSS is high, the connection of the amplifier input devices is reversed. This preserves the over-
all polarity of that amplifier gain; it inverts its input offset. By alternately reversing the connection, the am-
plifier’s offset is averaged to zero. This removes the most significant long-term drift mechanism in the
voltage reference. The CHOP_E bits control the behavior of CROSS. The CROSS signal will reverse the
amplifier connection in the voltage reference in order to negate the effects of its offset. On the first CK32
rising edge after the last multiplexer state of its sequence, the multiplexer will wait one additional CK32
cycle before beginning a new frame. At the beginning of this cycle, the value of CROSS will be updated
according to the CHOP_E bits. The extra CK32 cycle allows time for the chopped VREF to settle. During
this cycle, MUXSYNC is held high. The leading edge of MUXSYNC initiates a pass through the CE pro-
gram sequence. The beginning of the sequence is the serial readout of the four RTM words.
CHOP_E has four states: positive, reverse and two toggle states. In the positive state, CHOP_E = 01,
CROSS and CHOP_CLK are held low. In the reverse state, CHOP_E = 10, CROSS and CHOP_CLK are
held high. In the first toggle state, CHOP_E = 00, CROSS is automatically toggled near the end of each
multiplexer frame and an ALT frame is forced during the last multiplexer frame in each SUM cycle. It is
desirable that CROSS take on alternate values during each ALT frame. For this reason, if CHOP_E = 00,
CROSS will not toggle at the end of the multiplexer frame immediately preceding the ALT frame in each
accumulation interval.
Accumulationintervaln
Accumulationintervaln+1
1
2
3
4
25192520 1
2
3
4
25192520
Multiplexerframes
Multiplexerframes
Alternative MUX cycle
CROSS
Alternative MUX cycle
CROSS
Figure 4: CROSS Signal with CHOP_E = 00
Figure 4 shows CROSS over two accumulation interval when CHOP_E = 00: At the end of the first inter-
val, CROSS is low, at the end of the second interval, CROSS is high. The offset error for the two temper-
ature measurements taken during the ALT multiplexer frames will be averaged to zero. Note that the
number of multiplexer frames in an accumulation interval is always even. Operation with CHOP_E = 00
v1.2
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13
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