FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
By selecting the Evatronics R80515 core in the Keil compiler project settings and by using the compiler
directive “MODC2”, dual data pointers are enabled in certain library routines.
An alternative data pointer is available in the form of the PDATA register (SFR 0xBF, sometimes referred
to as USR2). It defines the high byte of a 16-bit address when reading or writing XDATA with the instruc-
tion MOVX A,@Ri or MOVX @Ri,A.
Internal Data Memory Map and Access
The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data memory
address is always 1 byte wide. Table 8 shows the internal data memory map.
The Special Function Registers (SFR) occupy the upper 128 bytes. The SFR area of internal data memo-
ry is available only by direct addressing. Indirect addressing of this area accesses the upper 128 bytes of
Internal RAM. The lower 128 bytes contain working registers and bit addressable memory. The lower 32
bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW)
select which bank is in use. The next 16 bytes form a block of bit addressable memory space at bit ad-
dresses 0x00-0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect ad-
dressing.
Table 8: Internal Data Memory Map
Address
0xFF
0x80
Direct addressing
Indirect addressing
Special Function Regis-
ters (SFRs)
RAM
0x7F
0x30
Byte addressable area
0x2F
0x20
Bit addressable area
0x1F
0x00
Register banks R0…R7
1.4.2 Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 9.
Only a few addresses in the SFR memory space are occupied, the others are not implemented. A read
access to unimplemented addresses will return undefined data, while a write access will have no effect.
SFRs specific to the 71M6531D/F and 71M6532D/F are shown in bold print on a gray field. The registers
at 0x80, 0x88, 0x90, etc., are bit addressable, all others are byte addressable.
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