HV300/HV310
Functional Block Diagram
V
DD
UVLO
and
POR
Internal
Supply
Regulator
Band Gap
Reference
Vref
HV300:PWRG
V
INT
HV310: PWRGD
UV
Vref
V
LOGIC
INT
V
REF
–
OV
Trans-
conductor
V
INT
–1.2V
10µA
+
Buffer
5kΩ
V
EE
SENSE
RAMP
GATE
Pinout
PWRGD Logic
Model
Condition
NOT READY
READY
PWRGD
VEE
1
8
7
6
5
PWRGD
VDD
0
1
1
HV300
HV310
2
3
4
OV
UV
RAMP
GATE
SENSE
HI Z
NOT READY
READY
HI Z
VEE
0
VEE
Pin Description
PWRGD – The Power Good Output Pin is held inactive on initial
power application and will go active when the external MOSFET
is fully turned on. This pin may be used as an enable control
when connected directly to a PWM power module.
RAMP – This pin provides a current output so that a timing
ramp voltage is generated when a capacitor is connected. The
initial portion of the ramp provides a time delay, which in
conjunction with the Under Voltage detection circuit eliminates
circuit card insertion contact bounce. The RAMP pin also controls
the delay between the current limit mode disengaging and the
PWRGD signal activating; as well as the current rise profile
after the initial turn on delay.
OV – This Over Voltage sense pin, when raised above its high
threshold will immediately cause the GATE pin to be pulled low.
The GATE pin will remain low until the voltage on this pin falls
below the low threshold limit, initiating a new start-up cycle.
GATE – This is the Gate Driver Output for the external N-
Channel MOSFET.
UV – This Under Voltage sense pin, when below its low threshold
limit will ensure that the GATE pin is low. The GATE pin will
remain low until the voltage on this pin rises above the high
threshold, initializing a new start-up cycle.
SENSE – The current sense resistor connected from this pin to
VEE pin programs the current limit. Constant current output
mode is established when the voltage drop across this resistor
reaches 50mV.
V
EE – This pin is the negative voltage power supply input to the
circuit.
V
DD – This pin is the positive voltage power supply input to the
circuit.
4
SUPERTEX [ Supertex, Inc ]
