SMS8198
CHARACTERISTICS OF THE I2C BUS
tingeightbits.Duringtheninthclockcycle,thereceiverwill
pulltheSDAlineLOWtoACKnowledgethatitreceivedthe
eight bits of data (See Figure 4).
General Description
The I2C bus was designed for two-way, two-line serial
communicationbetweendifferentintegratedcircuits. The
two lines are: a serial data line (SDA), and a serial clock
line (SCL). The SDA line must be connected to a positive
supply by a pull-up resistor, located somewhere on the
bus. Data transfer between devices may be initiated with
The SMS8198 will respond with an ACKnowledge after
recognition of a START condition and its slave address
byte. If both the device and a write operation are selected,
theSMS8198willrespondwithanACKnowledgeafterthe
receipt of each subsequent 8-bit word.
a START condition only when SCL and SDA are HIGH In the READ mode, the SMS8198 transmits eight bits of
(bus is not busy).
data, then releases the SDA line, and monitors the line for
an ACKnowledge signal. If an ACKnowledge is detected,
and no STOP condition is generated by the master, the
SMS8198 will continue to transmit data. If an
ACKnowledge is not detected, the SMS8198 will terminate
further data transmissions and awaits a STOP condition
before returning to the standby power mode.
Input Data Protocol
One data bit is transferred during each clock pulse. The
data on the SDA line must remain stable during clock
HIGH time, because changes on the data line while SCL
is HIGH will be interpreted as start or stop condition (See
Figure 2).
Device Addressing
START and STOP Conditions
Following a start condition the master must output the
address of the slave it is accessing. The most significant
four bits of the slave address are the device type identifier
When both the data and clock lines are HIGH, the bus is
saidtobenotbusy.AHIGH-to-LOWtransitiononthedata
line, while the clock is HIGH, is defined as the “START”
condition. A LOW-to-HIGH transition on the data line,
while the clock is HIGH, is defined as the “STOP” condi-
tion (See Figure 3).
(see figure 5). For the SMS8198 this is fixed as 1010bin
.
Word Address
The next three bits of the slave address are an extension
ofthearray’saddressandareconcatenatedwiththeeight
bits of address in the word address field, providing direct
access to the 2,048 X 8 array.
DEVICE OPERATION
TheSMS8198isa16,384-bitserialE2PROM. Thedevice
supports the I2C bidirectional data transmission protocol.
The protocol defines any device that sends data onto the
busasa“transmitter”andanydevicewhich receivesdata
as a “receiver.” The device controlling data transmission
is called the “master” and the controlled device is called
the “slave.” In all cases, the SMS8198 will be a “slave”
device, since it never initiates any data transfers.
Read/Write Bit
The last bit of the data stream defines the operation to be
performed. When set to “1,” a read operation is selected;
when set to “0,” a write operation is selected.
Acknowledge (ACK)
DEVICE
IDENTIFIER
HIGH ORDER
WORD ADDRESS
Acknowledge is a software convention used to indicate
successful data transfers. The transmitting device, either
themasterortheslave, willreleasethebusaftertransmit-
A10
A9
A8
R/W
1
0
1
0
2036 ILL7.0
Figure 5. Slave Address Byte
2036 5.0 4/18/00
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SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
