W144
Absolute Maximum Conditions[3]
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
Parameter
DD, VIN
TSTG
TB
Description
Voltage on any pin with respect to GND
Storage Temperature
Rating
–0.5 to +7.0
–65 to +150
–55 to +125
0 to +70
Unit
V
V
°C
°C
°C
kV
Ambient Temperature under Bias
Operating Temperature
TA
ESDPROT
Input ESD Protection
2 (min)
DC Electrical Characteristics TA = 0°C to +70°C; VDDQ3 = 3.3V 5ꢀ; VDDQ2 = 2.5V 5ꢀ
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Supply Current
IDD
IDD
Logic Inputs
3.3V Supply Current
CPU_F, CPU1 = 100.2 MHz
Outputs Loaded[4]
–
–
260
25
–
–
mA
mA
2.5V Supply Current
CPU_F, CPU1 = 100.2 MHz
Outputs Loaded[4]
VIL
Input Low Voltage
Input High Voltage
GND –
0.3
–
–
0.8
V
V
VIH
2.0
VDDQ3
0.3
+
IIL
IIH
IIL
IIH
Input Low Current[5]
Input High Current[5]
–
–
–
–
–
–
–
–
–25
10
PA
PA
PA
PA
Input Low Current (SEL100/66#)
Input High Current (SEL100/66#)
–5
+5
Clock Outputs
VOL
VOH
VOH
Output Low Voltage
Output High Voltage
IOL = 1 mA
IOH = 1 mA
IOH = –1 mA
–
–
–
–
50
–
mV
V
3.1
2.2
Output High Voltage CPU_F,1,
IOAPIC
–
V
IOL
Output Low Current
CPU_F, CPU1 VOL = 1.25V
27
20.5
40
25
25
25
25
31
40
27
27
25
57
53
85
37
37
37
55
55
87
44
44
37
97
139
140
76
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
PCI_F, PCI1:5
IOAPIC
VOL = 1.5V
VOL = 1.25V
VOL = 1.5V
REF0:1
48MHz
VOL = 1.5V
OL = 1.5V
76
24MHz
V
76
IOH
Output High Current CPU_F, CPU1 VOH = 1.25V
PCI_F, PCI1:5 VOH = 1.5V
97
139
155
94
IOAPIC
REF0:1
48MHz
24MHz
VOH = 1.25V
VOH = 1.5V
VOH = 1.5V
VOH = 1.5V
94
76
Notes:
3. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
4. All clock outputs loaded with 6" 60: traces with 22-pF capacitors.
5. W144 logic inputs (except FS3) have internal pull-up devices (pull-ups not full CMOS level). Logic input FS3 has an internal pull-down device.
Rev 1.0,November 21, 2006
Page 9 of 13