CY2SSTV857-27
AC Electrical Specifications (AVDD = VDDQ = 2.5V 5%, TA = 0°C to +85°C)(continued)[9, 10]
Parameter
Description
Output Enable Time[12]
(all outputs)
Condition
Min.
Typ.
Max.
Unit
tPZL, tPZH
3
25
ns
tPLZ, tPHZ
Output Disable Time[12]
(all outputs)
3
8
ns
tCCJ
Cycle to Cycle Jitter [10]
Half-period jitter[10, 13]
f > 66 MHz
–75
–100
1.5
–
75
100
7.5
7.5
100
50
ps
ps
ns
ns
ps
ps
tjit(h-per)
f > 66 MHz
–
t
t
PLH(tPD)
PHL(tPD)
Low-to-High Propagation Delay, CLK to Y
High-to-Low Propagation Delay, CLK to Y
Any Output to Any Output Skew[14]
Phase Error[14]
Test Mode only
3.5
3.5
1.5
tSK(O)
tPHASE
–50
Notes:
12. Refers to transition of non-inverting output.
13. Period jitter and half-period jitter specifications are separate specifications that must be met independently of each other.
14. All differential input and output terminals are terminated with 120:/16 pF, as shown in Figure 5.
Rev 1.0,November 21, 2006
Page 7 of 8