CY28439
Pin Description
Pin No.
6,56
Name
Type
Description
VDD_PCI
VSS_PCI
FS_E/PCI4
PWR 3.3V power supply for outputs.
GND Ground for outputs.
1,5
3
I,O, 3.3V-tolerant input for CPU frequency selection/33-MHz clock.
PU,SE Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
2,4,53,54, PCI
55
O, SE 33-MHz clocks.
7
8
PCIF0
O,SE 33-MHz free running clock
FS_A/PCIF1
I/O,PD, 3.3V-tolerant input for CPU frequency selection/Free running 33-MHz clock.
SE
I/O,PU, 3.3V-tolerant input for CPU frequency selection/Free running 33-MHz clock.
SE Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications.
9
FS_B/PCIF2
16
VTT_PWRGD#/PD I, PD 3.3V LVTTL input. This pin is a level sensitive strobe used to latch the FS_A, FS_B,
FS_C,FS_D, FS_E, SEL24_48. After VTT_PWRGD# (active LOW) assertion, this pin
becomes a real-time input for asserting power down (active HIGH).
10
11
VDD_48
PWR 3.3V power supply for outputs.
SEL24_48#/24_48 I/O, PD, Latched select input for 24-/48-MHz output/ 24-/48-MHz output
0 = 48 MHz, 1 = 24 MHz
M
SE
12
USB48
VSS_48
I/O, 48-MHz clock output.
GND Ground for outputs.
13
14,15
DOT96T, DOT96C O, DIF Fixed 96-MHz clock output.
17,18,21, SRCT/C
22,23,24,
30,31,32,
O, DIF Differential serial reference clocks. Outputs have overclocking capability.
33
19,28,34 VDD_SRC
PWR 3.3V power supply for outputs.
26,27
SRCT/C_SATAT/C O, DIF Differential serial reference clock. Recommended output for SATA.
20,25,29 VSS_SRC
GND Ground for outputs.
PWR 3.3V power supply for PLL.
GND Ground for PLL.
35
36
37
VDDA
VSSA
IREF
I
A precision resistor is attached to this pin, which is connected to the internal current
reference.
41
VDD_CPU
PWR 3.3V power supply for outputs.
O, DIF Differential CPU clock outputs.
GND Ground for outputs.
39,40,42,43 CPUT/C
38
45
44
46
47
48
49
50
VSS_CPU
SCLK
I
SMBus-compatible SCLOCK.
SMBus-compatible SDATA.
SDATA
I/O
VDD_REF
XOUT
PWR 3.3V power supply for outputs.
O, SE 14.318-MHz crystal output.
XIN
I
14.318-MHz crystal input.
VSS_REF
REF0/FS_D
GND Ground for outputs.
I/O,SE, 3.3V-tolerant input for CPU frequency selection/Reference clock. Refer to DC
PD Electrical Specifications table for Vil_FS and Vih_FS specifications.
51
REF1/FS_C
O, SE, 3.3V-tolerant input for CPU frequency selection/Reference clock.
PD Selects test mode if pulled to VIHFS_C when VTT_PWRGD# is asserted low.
Refer to DC Electrical Specifications table for VILFS_C,VIMFS_C,VIHFS_C specifica-
tions.
52
SRESET#
O, SE 3.3V output for Watchdog reset.
This output is open drain type with a high (>100-k:) internal pull-up resistor.
Rev 1.0,November 21, 2006
Page 2 of 21
SPECTRALINEAR [ SPECTRALINEAR INC ]
