CY2277A
Serial Configuration Map
• The Serial bits will be read by the clock driver in the following order:
Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0
• Reserved and unused bits should be programmed to “0”.
• SMBus Address for the CY2277A is:
Table 2.
A6
A5
A4
A3
A2
A1
A0
R/W
1
1
0
1
0
0
1
----
Byte 0: Functional and Frequency Select Clock
Register (1 = Enable, 0 = Disable)
Byte 0: Functional and Frequency Select Clock
Register (1 = Enable, 0 = Disable)
Bit 3 23
48/24 MHz (Frequency Select) 1 = 48 MHz
(default), 0 = 24 MHz
Bit Pin #
Bit 7 --
Description
(Reserved) drive to ‘0’
Bit 2 22
48/24 MHz (Frequency Select) 1 = 48 MHz
(default), 0 = 24 MHz
Bit 6 --
(Reserved) drive to ‘0’ on -1, -1M, -3, -7M,
-12, -12M, -12I
Bit 1 --
Bit 0
Bit 1 Bit 0
1
1
0
0
1 - Three-State (see table below)
0 - N/A
1 - Test Mode (see table below)
0 - Normal Operation
Bit 5 --
Bit 4 --
(Reserved) drive to ‘0’ on -1, -1M, -3, -7M,
-12, -12M, -12I
(Reserved) drive to ‘0’ on -1, -1M, -3, -7M,
-12, -12M, -12I
Rev 1.0,November 25, 2006
Page 4 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
