CY2277A
Switching Characteristics (-1, -3)[9, 10, 11]
Parameter
Output
Description
Output Duty Cycle[12]
Test Conditions
t1 = t1A y t1B
Min. Typ. Max.
Unit
t1
CPUCLK
SDRAM
USBCLK
IOCLK
45
50
55
%
REF [0,1]
IOAPIC
t1
t2
PCI
Output Duty Cycle[12]
t1 = t1A y t1B
40
50
55
%
CPUCLK, CPU and IOAPIC Clock
Between 0.4V and 2.0V, VDDCPU = 2.5V 0.75
Rising and Falling Edge Between 0.4V and 2.4V, VDDCPU = 3.3V 0.75
Rate
4.0
4.0
V/ns
IOAPIC
PCI
CPU clocks at 66.66 MHz
t2
t2
PCI Clock Rising and
Falling Edge Rate
Between 0.4V and 2.4V, VDDCPU = 3.3V 0.75
4.0
4.0
V/ns
V/ns
USBCLK, USB, I/O, REF0 Clock
Rising and Falling Edge
Rate
Between 0.4V and 2.4V
0.8
IOCLK,
REF0
t2
t2
t3
t3
t4
t4
SDRAM
SDRAM Rising and
Falling Edge Rate
Between 0.4V and 2.4V
SDRAM clocks at 66.66 MHz
1.0
0.5
4.0
2.0
V/ns
V/ns
ns
REF1
REF1 Rising and Falling Between 0.4V and 2.4V
Edge Rate
CPUCLK
CPU Clock Rise Time
Between 0.4V and 2.0V, VDDCPU = 2.5V 0.4
Between 0.4V and 2.4V, VDDCPU = 3.3V 0.5
2.13
2.0
USBCLK, USB Clock and I/O Clock Between 0.4V and 2.4V
Rise Time
2.5
ns
IOCLK
CPUCLK
CPU Clock Fall Time
Between 2.0V and 0.4V, VDDCPU = 2.5V 0.4
Between 2.4V and 0.4V, VDDCPU = 3.3V 0.5
2.13
2.0
ns
USBCLK, USB Clock and I/O Clock Between 2.4V and 0.4V
Fall Time
2.5
ns
IOCLK
t5
t6
CPUCLK
CPU-CPU Clock Skew
Measured at 1.25V, VDDCPU = 2.5V
100
2.0
400
6.0
ps
ns
CPUCLK, CPU-PCI Clock Skew
PCICLK (-1, -3)
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks
1.0
t7
t8
CPUCLK, CPU-SDRAM Clock
Skew
Measured at 1.25V for 2.5V clocks, and
at 1.5V for 3.3V clocks, VDDCPU = 2.5V
775
450
ps
ps
SDRAM
CPUCLK
Cycle-Cycle Clock Jitter Measured at 1.25V for 2.5V clocks and
at 1.5V for 3.3V clocks
t8
t8
t8
SDRAM
PCICLK
Cycle-Cycle Clock Jitter Measured at 1.5V for 3.3V clocks
Cycle-Cycle Clock Jitter Measured at 1.5V
650
500
1.3
ps
ps
ns
USBCLK, Cycle-Cycle Clock Jitter Measured at 1.5V
IOCLK
t9
CPUCLK, Power-up Time
PCICLK,
SDRAM
CPU, PCI, and SDRAM clock stabili-
zation from power-up
3
ms
t10
CPU, PCI, Frequency Slew Rate
SDRAM
Rate of change of frequency
2
MHz/
ms
Notes:
9. All parameters specified with loaded outputs.
10. Over the operating range unless otherwise specified.
11. Parameters specified with: V
12. Duty cycle is measured at 1.5V when V = 3.3V. When V
DD
= 2.5V, V
= 2.5V, V
= 3.3V.
= 2.5V, CPUCLK duty cycle is measured at 1.25V.
DDCPU
DDQ2
DDQ3
DDCPU
Rev 1.0,November 25, 2006
Page 9 of 18
SPECTRALINEAR [ SPECTRALINEAR INC ]
