CXA2101AQ
Pin
No.
Symbol
Equivalent circuit
Description
VCC
24
100
24
25
26
27
Capacitor connection for holding H sync peak.
H-PH
1.2k
1.2k
25µA
GND
VCC
500
1k
Composite video signal output for sync
separation.
The signal selected by I2C bus "HYSW" is
amplified to 6dB and output.
30k
YG-OUT
25
800µA
GND
VCC
Composite video signal input for sync
separation.
1.2k
10k
26
Normally, the signal output at Pin 25 is input
through a clamping capacitor.
The sync tip is clamped to 2.5V.
Input the signal at a sync level of 0.5 to
0.6Vp-p.
1.2k
3µA
YG-IN
25µA
GND
VCC
4k
For setting the reference current inside the IC
(mainly, sync signal processing system).
Connect to GND via the 47kΩ resistor (such
as a metal film resistor) with an error of less
than 1%.
27
IREF-SYNC
143
The pin voltage is approximately 4.6V.
4.7V
GND
VCC
1.2k
Either IN1 system HV or IN2 to IN5 system
selector output HV signals are selected by
I2C bus "YCBCR/MAT" and output with a
positive polarity.
50k
4.7V
28
29
VS-OUT
HS-OUT
28
29
143
VOH ≥ 3.5V
VOL ≤ 0.6V
GND
30
VCC-OUT
RGB system power supply.
– 6 –
SONY [ SONY CORPORATION ]
