CXA2101AQ
Pin Description
Pin
No.
Symbol
Equivalent circuit
Description
IN2-H: Separate H sync or CS input.
IN2-V: Separate V sync signal input.
Input the signals through a clamping
capacitor.
The bottom level is clamped to 2.5V.
Both positive and negative polarities are
VCC
1
IN2-H
IN2-V
1
2
1.2k
50µA
supported.
50µA
100k
Input the signals at the level shown below.
IN2-H
2
GND
0.5Vp-p ≤
≤ 5Vp-p
IN2-V
IN2 system signal inputs.
Input the signals through a capacitor.
The pin voltage is biased to 3V.
Refer to the input pin correspondence table.
Set the Y input level to 0.7Vp-p and color
difference input level to 0.7Vp-p using 100%
color bar signals.
In the case of sync on Y and sync on Green,
input the signal at a sync level of 0.3Vp-p.
VCC
3
4
5
3
4
5
IN2-1
IN2-2
IN2-3
143
200k
3V
GND
VCC
Selector system and sync processing system
power supply.
6
7
VCC-MAT
IN3-H
IN3-H: Separate H sync or CS input.
IN3-V: Separate V sync signal input.
Input the signals through a capacitor.
The bottom level is clamped to 2.5V.
Both positive and negative polarities are
supported.
7
8
1.2k
50µA
50µA
100k
Input the signals at the level shown below.
IN3-H
8
IN3-V
0.5Vp-p ≤
≤ 5Vp-p
IN3-V
GND
VCC
IN3 system signal inputs.
Input the signals through a capacitor.
The pin voltage is biased to 3V.
9
9
10
11
IN3-1
IN3-2
IN3-3
Refer to the input pin correspondence table.
Set the Y input level to 0.7Vp-p and color
difference input level to 0.7Vp-p using 100%
color bar signals.
In the case of sync on Y and sync on Green,
input the signal at a sync level of 0.3Vp-p.
10
11
143
200k
3V
GND
Input Pin Correspondence Table (by input signal)
IN2
IN3
2
IN4
2
IN5
2
1
×
2
×
3
O
×
1
×
3
O
×
1
×
3
O
×
1
×
3
O
×
Y
YHD
Pb
Pr
G
B
R
×
×
×
Cb
Cr
×
O
×
×
O
×
×
O
×
×
O
×
O
×
O
×
O
×
O
×
O = Input enabled; × = input disabled
– 4 –
SONY [ SONY CORPORATION ]
