CXA2101AQ
Pin
No.
Symbol
Equivalent circuit
Description
GND for selector block and sync processing
block.
12
GND-MAT
VCC
IN4-H: Separate H sync or CS input.
IN4-V: Separate V sync signal input.
Input the signals through a clamping capacitor.
The bottom level is clamped to 2.5V.
Both positive and negative polarities are
supported.
13
IN4-H
IN4-V
13
14
1.2k
50µA
50µA
100k
Input the signals at the level shown below.
IN4-H
14
0.5Vp-p ≤
≤ 5Vp-p
IN4-V
GND
IN4 system signal inputs.
Input the signals through a capacitor.
The pin voltage is biased to 3V.
Refer to the input pin correspondence table.
Set the Y input level to 0.7Vp-p and color
difference input level to 0.7Vp-p using 100%
color bar signals.
In the case of sync on Y and sync on Green,
input the signal at a sync level of 0.3Vp-p.
VCC
15
16
17
15
16
17
IN4-1
IN4-2
IN4-3
143
200k
3V
GND
VCC
100
18
V-PH
18
Capacitor connection for holding V sync peak.
1.2k
1.2k
25µA
GND
VCC
IN5-H: Separate H sync or CS input.
IN5-V: Separate V sync signal input.
Input the signals through a clamping capacitor.
The bottom level is clamped to 2.5V.
Both positive and negative polarities are
supported.
19
20
IN5-H
IN5-V
19
20
1.2k
50µA
50µA
100k
Input the signals at the level shown below.
IN5-H
0.5Vp-p ≤
≤ 5Vp-p
IN5-V
GND
VCC
IN5 system signal inputs.
Input the signals through a capacitor.
The pin voltage is biased to 3V.
Refer to the input pin correspondence table.
Set the Y input level to 0.7Vp-p and color
difference input level to 0.7Vp-p using 100%
color bar signals.
In the case of sync on Y and sync on Green,
input the signal at a sync level of 0.3Vp-p.
21
22
23
21
22
23
IN5-1
IN5-2
IN5-3
143
200k
3V
GND
– 5 –