FS714x Programmable Phase-Locked Loop Clock Generator
Data Sheet
Figure 2: Device Block Diagram
Table 1: FS7140 Pin Descriptions
Pin
1
2
3
4
Type
DI
DIO
DID
P
Name
SCL
SDA
ADDR0
VSS
Description
Serial interface clock (requires an external pull-up)
Serial interface data input/output (requires an external pull-up)
Address select bit “0”
Ground
5
6
7
8
AI
XIN
Crystal oscillator feedback
Crystal oscillator drive
Address select bit “1”
Power supply (+3.3V nominal)
PECL current drive programming
No connection
Ground
Reference frequency input
No connection
AO
DID
P
AI
-
XOUT
ADDR1
VDD
IPRG
n/c
VSS
REF
n/c
9
10
11
12
13
14
15
16
P
DIU
-
P
DO
DO
VDD
CLKP
CLKN
Power supply (+3.3V nominal)
Clock output
Inverted clock output
Key: AI: Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-up; DID = Input with Internal Pull-down; DIO = Digital Input/Output;
DI-3 = Three-Level Digital Input; DO = Digital Output; P = Power/Ground; # = Active Low Pin
AMI Semiconductor – Dec, 2007 – Rev. 4.0
2
www.amis.com
Specifications subject to change without notice
ROCHESTER [ Rochester Electronics ]
