B-52
01/99
J174, J175
P-Channel Silicon Junction Field-Effect Transistor
Absolute maximum ratings at T = 25¡C
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¥ Analog Switches
A
Reverse Gate Source & Reverse Gate Drain Voltage
– 30 V
50 mA
360 mW
Continuous Forward Gate Current
Continuous Device Power Dissipation
Power Derating
3.27 mW/°C
At 25°C free air temperature:
Static Electrical Characteristics
J174
J175
Process PJ99
Test Conditions
I = 1 µA, V = ØV
Min Max Min Max Unit
Gate Source Breakdown Voltage
Gate Reverse Current
V
30
30
V
nA
V
(BR)GSS
G
DS
I
1
1
6
V
= 20V, V = ØV
GSS
GS DS
Gate Source Cutoff Voltage
Drain Saturation Current (Pulsed)
Drain Cutoff Current
V
5
10
3
V
= – 15V, I = – 10 nA
GS(OFF)
DS
D
I
– 20 – 125 – 7 – 70 mA
V
= – 15V, V = ØV
DSS
DS
GS
I
– 1
Max
– 1
Max
nA
V
= – 15V, V = 10V
D(OFF)
DS
GS
Dynamic Electrical Characteristics
Drain Source ON Resistance
r
85
85
Ω
V
= Ø, V < = 0.1V
f = 1 kHz
ds(on)
GS
DS
Dynamic Electrical Characteristics
Typ
Typ
Drain Gate Capacitance
C
5.5
5.5
32
5.5
5.5
32
pF
pF
pF
V
= ØV, V = 10V
f = 1 MHz
f = 1 MHz
f = 1 MHz
gd
DS
GS
Source Gate Capacitance
C
V
= ØV, V = 10V
gs
DS
GS
Drain Gate + Source Gate Capacitance
C
+ C
V
= V = ØV
gd
gs
DS
GS
Switching Characteristics
J174
J175
Turn ON Delay Time
Rise Time
td
2
5
5
ns
ns
ns
ns
(on)
V
– 10
– 6
V
V
Ω
V
DD
t
10
10
20
r
V
R
12
8
1.2k
Ø
GS(OFF)
Turn OFF Delay Time
Fall Time
td
5
(off)
560
Ø
L
t
10
V
GS(ON)
f
TOÐ226AA Package
Dimensions in Inches (mm)
Surface Mount
SMPJ174, SMPJ175
Pin Configuration
1 Drain, 2 Gate, 3 Source
1000 N. Shiloh Road, Garland, TX 75042
(972) 487-1287 FAX (972) 276-3375
www.interfet.com
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