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FM33256B-GTR 参数 Datasheet PDF下载

FM33256B-GTR图片预览
型号: FM33256B-GTR
PDF下载: 下载PDF文件 查看货源
内容描述: 3V集成处理器伴侣与F-RAM [3V Integrated Processor Companion with F-RAM]
分类和应用:
文件页数/大小: 29 页 / 620 K
品牌: RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
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FM33256B SPI Companion w/ FRAM  
Pin Configuration  
Pin Name  
/CS  
Function  
Chip Select  
VDD  
ACS  
SCK  
SI  
CS  
SO  
1
2
14  
13  
SCK  
SI  
SO  
Serial Clock  
Serial Data Input  
Serial Data Output  
Power Fail Input  
Power Fail Output (NMI)  
Event Counter Input  
Alarm/Calibration/SqWave  
Reset Input/Output  
External Crystal Connections  
(optional)  
3
4
12  
11  
CNT  
VBAK  
X2  
PFI  
PFO  
CNT  
ACS  
/RST  
X1, X2  
5
6
7
10  
9
PFO  
RST  
PFI  
X1  
8
VSS  
VDD  
VBAK  
VSS  
Supply Voltage  
Battery-Backup Supply  
Ground  
Pin Descriptions  
Pin Name  
Type  
Pin Description  
/CS  
Input  
Chip Select: This active low input activates the device. When high, the device enters low-  
power standby mode, ignores the SCK and SI inputs, and the SO output is tri-stated.  
When low, the device internally activates the SCK signal. A falling edge on /CS must  
occur prior to every op-code.  
SCK  
SI  
Input  
Input  
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on the  
rising edge and outputs occur on the falling edge. Since the device is static, the clock  
frequency may be any value between 0 and 16 MHz and may be interrupted at any time.  
Serial Input: All data is input to the device on this pin. The pin is sampled on the rising  
edge of SCK and is ignored at other times. It should always be driven to a valid logic level  
to meet IDD specifications. The SI pin may be connected to SO for a single pin data  
interface.  
SO  
Output Serial Output: This is the data output pin. It is driven during a read and remains tri-stated  
at all other times. Data transitions are driven on the falling edge of the serial clock. The  
SO pin may be connected to SI for a single pin data interface.  
CNT  
ACS  
Input  
Event Counter Input: This input increments the counter when an edge is detected on this  
pin. The polarity is programmable and the counter value is nonvolatile or battery-backed,  
depending on the mode. This pin should be tied to ground if unused.  
Output Alarm/Calibration/SquareWave: This is an open-drain output that requires an external  
pullup resistor. In normal operation, this pin acts as the active-low alarm output. In  
Calibration mode, a 512 Hz square-wave is driven out. In SquareWave mode, the user  
may select a frequency of 1, 512, 4096, or 32768 Hz to be used as a continuous output.  
The SquareWave mode is entered by clearing the AL/SW and CAL bits in register 18h.  
X1, X2  
/RST  
PFI  
I/O  
32.768 kHz crystal connection (see Crystal Type section for suggestions). See AN407  
app. note for details on how to connect external oscillator.  
Reset: This active-low output is open drain with weak pull-up. It is also an input when  
used as a manual reset. This pin should be left floating if unused.  
Early Power-fail Input: Typically connected to an unregulated power supply to detect an  
early power failure. This pin must be tied to ground if unused.  
I/O  
Input  
PFO  
Output Early Power-fail Output: This pin is the early power-fail output and is typically used to  
drive a microcontroller NMI pin. PFO drives low when the PFI voltage is <1.5V.  
Supply Backup supply voltage: A 3V battery or a large value capacitor. If no backup supply is  
used, this pin should be tied to VSS and the VBC bit should be cleared. The trickle charger  
is UL recognized and ensures no excessive current when using a lithium battery.  
Supply Supply Voltage.  
VBAK  
VDD  
VSS  
Supply Ground  
This product conforms to specifications per the terms of the Ramtron  
standard warranty. The product has completed Ramtron’s internal  
qualification testing and has reached production status.  
Ramtron International Corporation  
1850 Ramtron Drive, Colorado Springs, CO 80921  
(800) 545-FRAM, (719) 481-7000  
www.ramtron.com  
Rev. 3.0  
Aug. 2012  
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