FM33256B SPI Companion w/ FRAM
512 Hz or
W
/OSCEN
Oscillator
SW out
Clock
Divider
Update
Logic
32.768 kHz
crystal
1 Hz
Years
8 bits
Months
5 bits
Date
6 bits
Hours
6 bits
Minutes
7 bits
Seconds
7 bits
CF
Days
3 bits
R
User Registers
Figure 9. Real-time Clock Core Block Diagram
Backup Power
The IBAK current varies with temperature and voltage
(see DC parametric table). Figure 10 shows IBAK as a
function of VBAK. These curves are useful for
calculating backup time when a capacitor is used as
the VBAK source.
The real-time clock/calendar is intended to be
permanently powered. When the primary system
power fails, the voltage on the VDD pin will drop.
When VDD is less 2.5V, the RTC (and event counters)
will switch to the backup power supply on VBAK. The
clock operates at extremely low current in order to
maximize battery or capacitor life. However, an
advantage of combining a clock function with FRAM
The minimum VBAK voltage varies linearly with
temperature. The user can expect the minimum VBAK
voltage to be 1.23V at +85°C and 1.90V at -40°C.
The tested limit is 1.55V at +25°C.
memory is that data is not lost regardless of the
backup power source.
Figure 10. IBAK vs. VBAK Voltage
Figure 11. VBAK (min.) vs Temperature
Note: The minimum VBAK voltage has been
characterized at -40°C and +85°C but is not
100% tested.
This product conforms to specifications per the terms of the Ramtron
standard warranty. The product has completed Ramtron’s internal
qualification testing and has reached production status.
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
www.ramtron.com
Rev. 3.0
Aug. 2012
Page 9 of 28
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
