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FM24CL64B-GTR 参数 Datasheet PDF下载

FM24CL64B-GTR图片预览
型号: FM24CL64B-GTR
PDF下载: 下载PDF文件 查看货源
内容描述: [Memory Circuit, 8KX8, CMOS, PDSO8, GREEN, MS-012AA, SOIC-8]
分类和应用: 存储
文件页数/大小: 13 页 / 115 K
品牌: RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
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FM24CL64  
AC Parameters (TA = -40° C to + 85° C, VDD =2.7V to 3.65V unless otherwise specified)  
Symbol Parameter Min Max Min Max Min Max Units Notes  
fSCL  
tLOW  
tHIGH  
tAA  
SCL Clock Frequency  
Clock Low Period  
Clock High Period  
SCL Low to SDA Data Out Valid  
0
4.7  
4.0  
100  
0
1.3  
0.6  
400  
0
0.6  
0.4  
1000  
kHz  
µs  
µs  
1
3
0.9  
0.55  
µs  
tBUF  
Bus Free Before New  
Transmission  
4.7  
1.3  
0.5  
µs  
tHD:STA  
tSU:STA  
Start Condition Hold Time  
Start Condition Setup for Repeated  
Start  
4.0  
4.7  
0.6  
0.6  
0.25  
0.25  
µs  
µs  
tHD:DAT  
tSU:DAT  
tR  
tF  
tSU:STO  
tDH  
Data In Hold  
Data In Setup  
Input Rise Time  
Input Fall Time  
Stop Condition Setup  
Data Output Hold  
0
250  
0
100  
0
100  
ns  
ns  
ns  
ns  
µs  
ns  
1000  
300  
300  
300  
300  
100  
2
2
4.0  
0
0.6  
0
0.25  
0
(from SCL @ VIL)  
Noise Suppression Time Constant  
on SCL, SDA  
tSP  
50  
50  
50  
ns  
Notes : All SCL specifications as well as start and stop conditions apply to both read and write operations.  
1
The speed-related specifications are guaranteed characteristic points along a continuous curve of operation from  
DC to 1 MHz.  
2
This parameter is periodically sampled and not 100% tested.  
Capacitance (TA = 25° C, f=1.0 MHz, VDD = 3V)  
Symbol  
CI/O  
CIN  
Parameter  
Input/output capacitance (SDA)  
Input capacitance  
Max  
8
6
Units Notes  
pF  
pF  
1
1
Notes  
This parameter is periodically sampled and not 100% tested.  
1
AC Test Conditions  
Input Pulse Levels  
Input rise and fall times  
Input and output timing levels  
0.1 VDD to 0.9 VDD  
10 ns  
0.5 VDD  
Equivalent AC Load Circuit  
3.65V  
1100  
Output  
100 pF  
Rev. 3.1  
Mar. 2005  
Page 9 of 13