FM24CL64
master issues a start condition. This simultaneously
aborts the write operation and allows the read
command to be issued with the device address LSB
set to a 1. The operation is now a current address
read.
No
Acknowledge
Stop
Start
S
Address
By Master
Slave Address
1
A
Data Byte
Data
1
P
By FM24CL64
Acknowledge
Figure 7. Current Address Read
No
Acknowledge
Start
S
Address
Acknowledge
By Master
Stop
Slave Address
1
A
Data Byte
A
Data Byte
1 P
By FM24CL64
Acknowledge
Data
Figure 8. Sequential Read
Start
No
Acknowledge
Address
Start
Address
By Master
Stop
S
Slave Address
0
A
Address MSB
A
Address LSB
Acknowledge
A
S
Slave Address
1
A
Data Byte
Data
1 P
By FM24CL64
Figure 9. Selective (Random) Read
Rev. 3.1
Mar. 2005
Page 7 of 13
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
