欢迎访问ic37.com |
会员登录 免费注册
发布采购

FM24C256-G 参数 Datasheet PDF下载

FM24C256-G图片预览
型号: FM24C256-G
PDF下载: 下载PDF文件 查看货源
内容描述: 256KB串行FRAM存储器 [256Kb FRAM Serial Memory]
分类和应用: 存储内存集成电路静态存储器光电二极管
文件页数/大小: 12 页 / 98 K
品牌: RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
 浏览型号FM24C256-G的Datasheet PDF文件第4页浏览型号FM24C256-G的Datasheet PDF文件第5页浏览型号FM24C256-G的Datasheet PDF文件第6页浏览型号FM24C256-G的Datasheet PDF文件第7页浏览型号FM24C256-G的Datasheet PDF文件第9页浏览型号FM24C256-G的Datasheet PDF文件第10页浏览型号FM24C256-G的Datasheet PDF文件第11页浏览型号FM24C256-G的Datasheet PDF文件第12页  
FM24C256  
Electrical Specifications  
Absolute Maximum Ratings  
Symbol  
Description  
Ratings  
VDD  
VIN  
Voltage on VDD with respect to VSS  
Voltage on any signal pin with respect to VSS  
-1.0V to +7.0V  
-1.0V to +7.0V  
and VIN < VDD+1.0V *  
TSTG  
TLEAD  
VESD  
Storage Temperature  
Lead temperature (Soldering, 10 seconds)  
Electrostatic Discharge Voltage  
-55°C to + 125°C  
300° C  
- Human Body Model (JEDEC Std JESD22-A114-B)  
- Machine Model (JEDEC Std JESD22-A115-A)  
Package Moisture Sensitivity Level  
4kV  
400V  
MSL-1  
* Exception: The “VIN < VDD+1.0V” restriction does not apply to the SCL and SDA inputs.  
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating  
only, and the functional operation of the device at these or any other conditions above those listed in the operational section of this  
specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.  
DC Operating Conditions (TA = -40° C to + 85° C, VDD = 4.5V to 5.5V unless otherwise specified)  
Symbol  
VDD  
Parameter  
Main Power Supply  
Min  
4.5  
Typ  
5.0  
Max  
5.5  
Units  
V
Notes  
IDD  
VDD Supply Current  
@ SCL = 100 kHz  
@ SCL = 400 kHz  
@ SCL = 1 MHz  
1
200  
500  
1.2  
µA  
µA  
mA  
ISB  
ILI  
ILO  
VIH  
VIL  
VOL  
Standby Current  
100  
10  
10  
2
3
3
4
4
µA  
µA  
µA  
V
V
V
Input Leakage Current  
Output Leakage Current  
Input High Voltage  
Input Low Voltage  
Output Low Voltage  
@ IOL = 3 mA  
0.7 VDD  
-0.3  
VDD + 0.5  
0.3 VDD  
0.4  
RIN  
Address Input Resistance (WP, A2-A0)  
For VIN = VIL (max)  
20  
1
5
4
KΩ  
MΩ  
V
For VIN = VIH (min)  
VHYS  
Notes  
Input Hysteresis  
0.05 VDD  
1. SCL toggling between VDD-0.3V and VSS, other inputs VSS or VDD-0.3V  
2. SCL = SDA = VDD. All inputs VSS or VDD. Stop command issued.  
3. VIN or VOUT = VSS to VDD. Does not apply to WP, A2-A0 pins.  
4. This parameter is characterized but not tested.  
5. The input pull-down circuit is strong (20K) when the input voltage is below VIL and weak (1M) when the input voltage  
is above VIH. This resistance is characterized and not tested.  
Rev 3.1  
May 2005  
Page 8 of 12