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P3C125612JC 参数 Datasheet PDF下载

P3C125612JC图片预览
型号: P3C125612JC
PDF下载: 下载PDF文件 查看货源
内容描述: 高速32K ×8 3.3V CMOS静态RAM [HIGH SPEED 32K x 8 3.3V STATIC CMOS RAM]
分类和应用:
文件页数/大小: 10 页 / 266 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
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P3C1256  
CAPACITANCES(4)  
(VCC = 5.0V, TA = 25°C, f = 1.0 MHz)  
Parameter  
Test Conditions  
VIN = 0V  
Max  
10  
Unit  
pF  
Symbol  
CIN  
Input Capacitance  
Output Capacitance  
COUT  
VOUT = 0V  
10  
pF  
POWER DISSIPATION CHARACTERISTICS VS. SPEED  
Temperature  
Range  
Test  
Conditions  
Symbol  
Parameter  
Unit  
-20 -25  
-12 -15  
Commercial  
Industrial  
*
*
110 100  
N/A 115  
mA  
mA  
95  
90  
ICC  
Dynamic Operating Current  
110 105  
*Tested with outputs open and all address and data inputs changing at the maximum write-cycle rate.  
The device is continuously enabled for writing, i.e., CE, and WE VIL (max), OE is high. Switching inputs are 0V  
and 3V.  
AC ELECTRICAL CHARACTERISTICS - READ CYCLE  
(Over Recommended Operating Temperature & Supply Voltage)  
-12  
-15  
-20  
-25  
Unit  
ns  
Symbol  
Parameter  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
tRC  
Read Cycle Time  
Address Access Time  
12  
15  
20  
25  
tAA  
tAC  
tOH  
tLZ  
12  
12  
15  
15  
20  
20  
25  
25  
ns  
Chip Enable Access  
Time  
ns  
ns  
ns  
Output Hold from  
Address Change  
2
2
2
2
2
2
2
2
Chip Enable to  
Output in Low Z  
tHZ  
tOE  
Chip Disable to  
Output in High Z  
ns  
7
7
8
9
9
10  
12  
Output Enable Low  
to Data Valid  
11  
ns  
ns  
Output Enable Low to  
Low Z  
tOLZ  
0
0
0
0
0
0
0
0
Output Enable High  
to High Z  
tOHZ  
tPU  
ns  
ns  
ns  
6
7
9
10  
20  
Chip Enable to Power  
Up Time  
Chip Disable to  
Power Down Time  
tPD  
12  
15  
20  
Document # SRAM122 REV B  
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