November 2006
rev 0.3
ASM2P2310A
Parameter Measurement Information
From Output
Under Test
CL = 25 pF on Yn
500ꢀ
A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 200 MHz, ZO = 50ꢀ, tr < 1.2 ns, tf < 1.2 ns.
Figure 2. Test Load Circuit
VDD
50% VDD
CLK
0 V
tPLH
tPHL
VOH
50% VDD
1.7V or 2V
Yn
0.4V
tr
0.4V
VOL
tf
Figure 3. Voltage Waveforms Propagation Delay Times
VDD
CLK
0 V
VOH
50% VDD
Any Y
VOL
VOH
50% VDD
Any Y
VOL
tSK(O)
tSK(O)
Figure 4. Output Skew
2.5-V TO 3.3-V High-Performance Clock Buffer
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Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
