Preliminary
ML696201 and ML69Q6203
Pin Configuration
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
PIOD[8]/
PIOD[11]/ PIOD[12]/
NC
NC
NC
EFIQ_N
NC
NC
PIOD[0]/
SCLD
PIOD[1]/
WSD
PIOD[3]/
CKOUTD
PIOD[6]/
SDA
PIOD[14]/ PWMOUT TMODE[2] TMODE[0] BOOT[1]
UP_TXD
GND_
CORE
GND_IO
GND_IO
SSIOTXD SSIOTXD SSIORXD
[0]
AA
Y
[1]
[1]
PIOD[9]/
SSIORXD
[0]
NC
NC
NC
NC
NC
NC
NC
NC
GND_IO
GND_IO
GND_IO
NC
GND_IO
GND_IO
GND_IO
VDD_
CORE
PIOD[2]/
SDD
PIOD[4]/
SCLA/SCL
VDD_FLA
PIOD[13]
SSIOCK[1]
SCL
TEST_
RSV
TMODE[1] EXTBUS
TMODE[3] IDEMODE
BOOT[0]
GND_
CORE
GND_IO
TDO
PIOD[7]/
CKOUTA/
CKOUT
RESET_N
GND_IO
VDD_
CORE
VDD_
CORE
PIOD[5]/
WSA
PIOD[10]/ PIOD[15]/
SSIOCK[0] UP_RXD
SDAT
PLL
BYPASS
GND_
CORE
GND_IO
nTRST
RTCK
TCK
FD[0]/
IDED[0]
VSSFLA
W
V
NC
NC
NC
NC
VDD_
CORE
VDD_IO
VDD_IO
GND_
CORE
GND_
CORE
VDD_IO
VDD_IO
VDD_
CORE
VDD_IO
VDD_IO
GND_IO
GND_IO
VDD_IO
VDD_IO
FD[2]/
IDED[2]
FD[1]/
IDED[1]
NC
NC
ADIN[1]
ADIN[3]
VSSFLA
AVDD
FD[6]/
IDED[6]
FD[4]/
IDED[4]
U
NC
ADIN[2]
AGND
GND_
CORE
PIOF[0]/
IDED[8]
FD[7]/
IDED[7]
T
ADIN[0]
VDD_IO
TMS
PIOF[3]/
IDED[11]
PIOF[2]/
IDED[10]
R
VDD_PLL OSC48M0 OSC48M1B
VDD_
CORE
VDD_
CORE
TDI
PIOF[5]/
IDED[13]
PIOF[4]/
IDED[12]
P
USB_
VOREF
USB_
ATEST[0]
VDD_PLL OSC11M0
GND_PLL OSC11M1B
VDD_
CORE
FD3/
IDED[3]
IDED[15]
PIOF[6]/
IDED[14]
N
USB_
REXT
AVDDC
AGNDC
GND_
CORE
FD[5]/
IDED[5]
OSC32K1B GNDRTC
M
L
272-Pin LFBGA
(TOP VIEW)
AVDDRX
USB_DP
USB_
ATEST[1]
GND_PLL
TCOUT
VDD_IO
VDD_IO
VDD_IO
VDD_IO
PIOF[1]/
IDED[9] TESTMODE
RTC_
OSC32K
[0]
AGNDTX DREQCLR
32K_
IDE
IDEIRQ
K
J
TESTMODE NPCBRID
USB_DM AGNDTX
XDQM[0]
XSDCKE
VDD_IO
DREQ
VDDRTC
IDEDACK IDEREQQ
_N
FCLE/
IDECS_N
[0]
FALE/
FRB/
AVDDTX
XCAS_N
AGNDRX
XRAS_N
XDQM[1]
XSYSCLK
XSDCLK
VDD_IO
IDECS_N
IDERDY
H
[1]
FWR_N/
FRD_N/
VDD_
CORE
IDERST_
N
IDEWR_N
IDERE_N
G
F
PIOC[1]/ XSDCS_N PIOC[0]/
XWAIT
[1]
VDD_
CORE
IDEA[1]
IDEA[2]
PIOE[1]
PIOE[3]
PIOE[8]
GND_IO
IDEA[0]
PIOE[0]
PIOE[2]
PIOE[7]
PIOE[9]
XWAIT
[0]
PIOC[2]/
XBS_N
[0]
PIOC[4]/
XIOCS_N
[0]
PIOC[3]/
XBS_N
[1]
GND_
CORE
GND_
CORE
E
GND_IO
GND_IO
VDD_IO
GND_IO
PIOC[6]/
GND_
CORE
GND_
CORE
GND_
CORE
VDD_IO
VDD_IO
VDD_IO
VDD_
CORE
GND_
CORE
VDD_IO
VDD_IO
VDD_
CORE
VDD_
CORE
GND_IO
PIOE[6]
PIOE[12]
GND_IO
PIOE[4]
PIOE[13]
PIOE[5]
GND_IO
PIOE[10]
D
C
B
A
PIOC[9]/
XROMCS
_N
PIOC[10]/
XWE_N
PIOC[5]/
PIOC[7]/
PIOC[8]/
GND_IO
PIOB[5]/
XD[5]
PIOB[9]/
XD[9]
PIOB[13]/
XD[13]
PIOA[3]/
XA[4]
PIOA[7]/
XA[8]
PIOA[10]/ PIOC[12]/
XA[11] XA[17]
XA[21]
PIOE[15]
XA[23]
XIOCS_N XIOCS_N XIOCS_N XRAMCS_N
[10]
[1]
[11]
PIOC[11]/
XOE_N
GND_IO
PIOB[0]/
XD[0]
PIOB[2]/
XD[2]
PIOB[7]/
XD[7]
PIOB[10]/ PIOB[12]/
XD[10]
PIOA[0]/
XA[1]
PIOB[15]/
XD[15]
PIOA[1]/
XA[2]
PIOA[5]/
XA[6]
PIOA[9]/
XA[10]
PIOA[12]/ PIOA[15]/ PIOC[14]/
XA[13] XA[16] XA[19]
XD[12]
GND_IO
PIOB[1]/
XD[1]
PIOB[3]/
XD[3]
PIOB[4]/
XD[4]
PIOB[6]/
XD[6]
PIOB[8]/
XD[8]
PIOB[11]/ PIOB[14]/
XD[11]
PIOA[2]/
XA[3]
PIOA[4]/
XA[5]
PIOA[6]/
XA[7]
PIOA[8]/
XA[9]
PIOA[11]/ PIOA[13]/ PIOA[14]/ PIOC[13]/ PIOC[15]/
XA[12]
XA[22]
PIOE[14]
PIOE[11]
GND_IO
XD[14]
XA[14]
XA[15]
XA[18]
XA[20]
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Figure 1. 272-Pin LFBGA
Notes:
1. For pins that have multiple functions, the signals are noted by their pri-
mary / secondary functions.
2. NC pins can be connected to VDD_IO or GND.
Oki Semiconductor • 5
OKI [ OKI ELECTRONIC COMPONETS ]
