¡ Semiconductor
3.4 Other Interfaces
Signal Name Type
txd/pcfg [0]
rxd/pcfg [1]
porn
xin
xout
B
I
I
I
O
Pin Count
1
1
1
1
1
Total 5 pins
Power-on-reset signal (connect to power monitor circuit)
Clock I/O (connect a crystal oscillator between xin and xout)
Description
Serial data I/O and chip mode setting
ML54053
*
The chip mode is determined depending upon the status of pcfg[1:0] when the porn signal
rises.
pcfg[1:0] = 11 : Normal mode
pcfg[1:0] = 01 : External CPU connection mode
pcfg[1:0] = 10 : External ROM connection mode
pcfg[1:0] = 00 : Test mode (normally not used)
3.5 Power Supply
Signal Name Type
VDD-CORE
VSS-CORE
VDD
VSS
DC
DC
DC
DC
Pin Count
2
2
6
9
Total 19 pins
Power supply for I/O pad
Power supply for core
Description
3.6 Pin Totals
Host Interface
NAND Flash Memory Interface
Extended Bus Interface
Other Interfaces
Power Supply
Total
42
31
23
5
19
120
5/22
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