¡ Semiconductor
MSM6242B
PIN DESCRIPTION
Name
D
0
D
1
D
2
D
3
A
0
A
1
A
2
A
3
ALE
Pin No.
RS
GS
14
13
12
11
4
5
6
7
3
19
16
15
14
5
7
9
10
4
Address input pin for use by a microcomputer to select internal clock/calendar's
registers and control registers for Read/Write operations (See Function Table
Figure 1). Address input pins A0-A3 are used in combination with ALE for
addressing registers.
Address Latch Enable pin. This pin enables writing of address data when ALE = 1
and
CSO
= 0; address data is latched when ALE = 0 Microcontroller/Micro-
processors having an ALE output should connect to this pin; otherwise it should
be connected at V
DD
Writing of data is performed by this pin.
When CS
1
= 1 and
CS
O
= 0, D
0
~ D
3
data is written into the register at the rising
edge of
WR.
Reading of register data is accomplished using this pin. When CS
1
= 1,
CS
O
= 0
and
RD
= 0, the data of this register is output to D
0
~ D
3
. If both
RD
and
WR
are
set at 0 simaltaneously,
RD
is to be inhibited.
Chip Select pins. These pins enable/disable ALE,
RD
and
WR
operation.
CS
O
and ALE work in combination with one another, while CS
1
work independent
with ALE. CS
1
must be connected to power failure detection as shown in Figure
18.
Output pin of N-CH OPEN DRAIN type. The output data is controlled by the
D
1
data content of C
E
register. This pin has a priority to
CS
O
and CS
1
.
Refer to Figure 9 and FUNCTIONAL DESCRIPTION OF REGISTERS.
32.768 kHz crystal is to be connected to these pins.
When an external clock of 32.768 kHz is to be used for MSM6242's oscillation
source, either CMOS output or pull-up TTL output is to be input from XT, while
XT
should be left open.
Power supply pin. +2 ~ +6V power is to be applied to this pin.
Ground pin.
R
FB
5M
Ω
XT
X'tal
C
1
V
DD
OR GND
C
2
XT
C
1
= C
2
= 15 ~ 30pF
32.768 kHz
N-CH
STD.P OUTPUT
V
DD
Description
Data Input/Output pins to be directly connected to a microcontroller bus for
reading and writing of the clock/calendar's registers and control registers. D0 = LSB
and D3 = MSB.
WR
10
13
RD
CS
0
CS
1
8
2
15
11
2
20
STD.P
1
1
XT
XT
V
DD
GND
16
17
18
9
22
23
24
12
The impedance of the crystal should be less than 30k
Ω
Figure 8. Oscillator Circuit
Figure 9.
31
OKI [ OKI ELECTRONIC COMPONETS ]
