¡ Semiconductor
MSM6242B
Reading Method 3 when Not Using HOLD Bit
Initialization only at power ON
Reading Method 2 when Not Using HOLD Bit
Initialization only at power ON
•*1 and *2 represent the minimum required
•*1 and *2 represent the minimum required
time unit.
time out.
t1
t0
*1
*2
t1
t0
*1
*2
For example
For example
t1 = 0 and tO = 1 when required to a
unit of second;
t1 = 1 and tO = 0 when required to a
unit of minute; and
t1 = 1 and tO = 1 when required to a
unit of hour;
t1 = 0 and tO = 1 when required to a
ITRPT/STNT
MASK
1
0
ITRPT/STNT
MASK
1
0
unit of second;
t1 = 1 and tO = 0 when required to a
unit of minute; and
t1 = 1 and tO = 1 when required to a
unit of hour;
CPU senses the
interruption.
0
IRQ FLAG
WAIT t
REGISTER CD READ
See Note
below
NO
Retried the reading, since a
carry occurred during the
operation.
IRQ FLAG = 1
YES
The other IC causes
the interruption.
TIME DATA READ
The interruption is caused by
this IC due to the occurrence
of a carry.
WAIT t
REGISTER CD READ
TIME DATA READ
NO
(Note)
IRQ FLAG = 0
Do this process within the following
time requirements by combination
between t1 and t0:
The IRQ FLAG is cleared to
read the next time data.
0
IRQ FLAG
YES
Normal read
t1 = 0 and tO = 1 . . . Less than 1 second
t1 = 1 and tO = 0 . . . Less than 1 minute
t1 = 1 and tO = 1 . . . Less than 1 hour
END
t
: 12 HOUR MODE . . . 35µS
24 HOUR MODE . . . 3µS
CD REGISTER (Control D Register)
a) HOLD (D0) –
Setting this bit to a "1" inhibits the 1Hz clock to the S1 counter, at which
time the Busy status bit can be read. When Busy = 0, register's S ~ W
can be read or written. During this procedure if a carry occurs t1he S1
counterwillbeincrementedby1secondafterHOLD=0(thiscondition
is guaranteed as long as HOLD = 1 does not exceed 1 second in
duration). If CS1 = 0 then HOLD = 0 irrespective of any condition.
Status bit which shows the interface condition with microcontroller/
microprocessors. As for the method of writing into and reading from
S1 ~ W (address φ ~ C), refer to the flow chart described in Figure 10.
b) BUSY (D1) –
c) IRQ FLAG (D2) – This status bit corresponds to the output level of the STD.P output.
When STD.P = 0, then IRQ = 1; when STD.P = 1, then IRQ = 0. The IRQ
FLAG indicates that an interrupt has occurred to the microcomputer if
IRQ = 1. When D0 of register C (MASK) = 0, then the STD.P output
changes according to the timingEset by D3 (t1) and D2 (t0) of register E.
When D1 of register E (ITRPT/STND) = 1 (interrupt mode), the STD.P
output remains low until the IRQ FLAG is written to a "0". When IRQ
= 1 and timing for a new interrupt occurs, the new interrupt is ignored.
When ITRPT/STND = 0 (Standard Pulse Output mode) the STD.P
output remains low until either "0" is written to the IRQ FLAG;
otherwise, the IRQ FLAG automatically goes to "0" after 7.8125ms.
When writing the HOLD or 30 second adjust bits of register D, it is
necessary to write the IRQ FLAG bit to a "1".
d) ±30 ADJ (D3) –
When 30-second adjustment is necessary, a "1" is written to bit D3
during which time the internal clock registers should not be read from
or written to 125µs after bit D3 = 1 it will automatically return to a "0",
and at that time reading or writing of registers can occur.
33
OKI [ OKI ELECTRONIC COMPONETS ]
