11AA02E48/11AA02E64
FIGURE 1-1:
BUS TIMING – START HEADER
10
11
2
SCIO
Data ‘0’ Data ‘1’ Data ‘0’ Data ‘1’ Data ‘0’ Data ‘1’ Data ‘0’ Data ‘1’ MAK bit NoSAK bit
FIGURE 1-2:
BUS TIMING – DATA
2
7
8
12
SCIO
Data ‘0’
Data ‘1’
Data ‘1’
Data ‘0’
FIGURE 1-3:
BUS TIMING – STANDBY PULSE
9
SCIO
Standby
Mode
FIGURE 1-4:
BUS TIMING – JITTER
2
2
3
3
6
6
6
6
Ideal Edge
from Master
Ideal Edge
from Master
Ideal Edge
from Slave
Ideal Edge
from Slave
DS20002122D-page 4
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