Et r on Tech
EM6A9320
4Mx32 DDR SDRAM
Extended Mode Register Set (EMRS)
The Extended Mode Register Set stores the data for enabling or disabling DLL and selecting output driver
strength. The default value of the extended mode register is not defined, therefore must be written after power
up for proper operation. The extended mode register is written by asserting low on CS#, RAS#, CAS#, and WE#.
The state of A0, A2 ~ A5, A7 ~ A11and BA1 is written in the mode register in the same cycle as CS#, RAS#,
CAS#, and WE# going low. The DDR SDRAM should be in all bank precharge with CKE already high prior to
writing into the extended mode register. A1 and A6 are used for setting driver strength to normal, weak or
matched impedance. Two clock cycles are required to complete the write operation in the extended mode
register. The mode register contents can be changed using the same command and clock cycle requirements
during operation as long as all banks are in the idle state. A0 is used for DLL enable or disable. "High" on BA0 is
used for EMRS. Refer to the table for specific codes.
Extended Mode Resistor Bitmap
BA1
0
BA0
1
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
RFU must be set to “0”
DS1
RFU must be set to “0”
DS0
DLL
BA0 Mode
A6 A1
Drive Strength
Full
Strength
100%
60%
Comment
A0
0
DLL
Enable
0
1
MRS
0
0
1
1
0
1
0
EMRS
SSTL-2 weak
RFU
1
Disable
RFU Do not use
1 Matched impedance 30%
Output driver matches impedance
Power up Sequence
Power up must be performed in the following sequence.
1) Apply power to VDD before or at the same time as VDDQ, VTT and VREF when all input signals are held
"NOP" state and maintain CKE “LOW”.
2) Start clock and maintain stable condition for minimum 200us.
3) Issue a “NOP” command and keep CKE “HIGH”
4) Issue a “Precharge All” command.
5) Issue EMRS – enable DLL.
6) Issue MRS – reset DLL. (An additional 200 clock cycles are required to lock the DLL).
7) Precharge all banks of the device.
8) Issue two or more Auto Refresh commands.
9) Issue MRS – with A8 to low to initialize the mode register.
Etron Confidential
7
Rev 0.3
July. 2002
ETRON [ ETRON TECHNOLOGY, INC. ]
