Et r on Tech
EM566168
AC Test Loads
RL = 50 Ω
VL = 1.5 V
DOUT
CL1 = 50 pF
Z0 = 50 Ω
Note:
1. Including scope and jig capacitance
State Diagram
Deep Power Down Exit Sequence
CE1# = VIH or VIL,
CE2=VIH
Deep Power
Down Mode
CE1# =VIH or
VIL, CE2=VIH
CE2=VIL
Power
on
Initial State
(Wait 200µs)
Active
CE2=VIH, CE1# =VIH
or UB#, LB# =VIH
CE2=VIL
CE1# =VIL, CE2=VIH,
UB# & LB# or/and LB# = VIL
Standby
Mode
Power Up Sequence
Standby Mode Characteristics
Power Mode
Standby
Memory Cell Data
Standby Current (µA)
Wait Time (µs)
Valid
100
10
0
Deep Power Down
Invalid
200
Preliminary
6
Rev 0.2
Feb. 2002
ETRON [ ETRON TECHNOLOGY, INC. ]
