ES1988 PRODUCT BRIEF
Table 1 ES1988 Pin Descriptions (Continued)
Name
GD[2]
EDIN
Pin Number
I/O
I/O
I
Description
Game port data Input/Output.
Data input from EEPROM data output. EDIN goes active after power-on reset and goes
inactive automatically after EEPROM cycle is complete.
44
VOLUP#
I
Hardware volume control (volume up). Used in combination with pin 45 (VOLDN#). Hardware
volume control is enabled by setting PCI 52 [7] = 1. Pins 44:45 is selected for hardware
volume control by setting PCI 52h [5] = 1. Pins 53:54 may also be used for hardware volume
control.
GD[3]
ECLK
I/O
O
Game port data input/output.
Clock output to EEPROM clock input. ECLK goes active after power-on reset and goes
inactive automatically after EEPROM cycle is complete.
45
VOLDN#
I
Hardware volume control (volume down). Used in combination with pin 44 (VOLUP#).
Hardware volume control is enabled by setting PCI 52 [7] = 1. Pins 44:45 is selected for
hardware volume control by setting PCI 52h [5] = 1. Pins 53:54 may also be used for
hardware volume control.
GD[4]
46
I
I
Game port data input.
GD[5:7]
GPIO[13:15]
I2SCLK
SIRQ#
Game port data input.
47:49
I/O
I
General-purpose input/output.
2
2
I S serial clock input. I S input is enabled by setting Allegro_Base+37h [15] = 1.
I/O
Serial interrupt request. Optional PC/PCI system implementation. Serial IRQ is enabled by
setting PCI 40h [14] = 1.
50
51
GPIO4
I2SLR
GTO#
I/O
I
General-purpose input/output
2
2
I S frame sync input. I S input is enabled by setting Allegro_Base+37h [15] = 1.
O
Grant to PCI master. GTO# is enabled by setting PCIx2 arbiter bits PCI 58h [0] = 1 and PCI
58h [11] = 1. Select GT0#/GSO from pin 51 by enabling PCI 58h [10] = 0. Pin 63 may also be
used as GT0#/GSO.
GSO
O
Grant select 0 output to control external quick switch to grant PCI master phase. GSO is
enabled by setting PCIx2 arbiter bit PCI 58h [0] = 1 and PCI 58h [11] = 0. Select GS0/GT0#
from pin 51 by enabling PCI 58h [10] = 0. Pin 63 may also be used as GT0#/GSO.
GPIO5
I2SDATA
R0#
I/O
General-purpose input/output.
2
2
I
I
I S data input. I S input is enabled by setting Allegro_Base+37h [15] = 1.
PCI bus request 0 input from external PCI master device. RO# is enabled by setting the
PCIx2 arbiter bit PCI 58h [0] = 1. Select R0# from pin 52 by enabling PCI 58h [10] = 0. Either
pin 2 or pin 52 may be used for R0#.
52
53
GPIO6
I/O
I
General-purpose input/output.
MC_97DI
PCREQ#
Modem Codec data input. Enabled by setting Allegro_Base+38h [3] = 1.
O
PC/PCI request output. Enable PCREQ# by setting PCI 50h [10:8] = 010. Pin 53 is used as
PCREQ# when configured as an audio-only device. PCREQ# can only be used from pin 2
when configured as a multifunction device (see pin 60 note).
VOLUP#
GPIO7
I
Hardware volume control (volume up). Used in combination with pin 54 (VOLDN#). Hardware
volume control is enabled by setting PCI 52 [7] = 1. Pins 53:54 is selected for hardware
volume control by setting PCI 52h [5] = 0. Pins 44:45 may also be used for hardware volume
control.
I/O
General-purpose input/output.
4
SAM0368-051302
ESS Technology, Inc.
ESS [ ESS Technology,Inc ]
