ESMT
M24L16161ZA
Variable Address Space Register (VAR)
Variable Address Space—Address Patterns
Partial Array Refresh Mode (A3=0, A4=1)
A2
0
A1, A0
Refresh Section
1/4th of the array
1/2th of the array
3/4th of the array
1/4th of the array
1/2th of the array
3/4th of the array
Address
00000h - 3FFFFh (A19 = A18 = 0)
00000h - 7FFFFh (A19 = 0)
Size
Density
1
1
1
0
256K x 16
512K x 16
768K x 16
4M
8M
0
00000h - BFFFFh (A19:A18 not equal to 11)
12M
0
1
1
1
0
1
1
0
1
1
0
1
C0000h - FFFFFh (A19 = A18 = 1)
80000h - FFFFFh (A19 = 1)
256K x 16
512K x 16
786K x 16
4M
8M
40000h - FFFFFh (A19:A18 not equal to 00)
12M
Reduced Memory Size Mode (A3=1, A4=1)
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1/4th of the array
1/2th of the array
3/4th of the array
Full array
00000h - 3FFFFh (A19 = A18= 0)
00000h - 7FFFFh (A19 = 0)
256K x 16
512K x 16
768K x 16
1M x 16
4M
8M
00000h - BFFFFh (A19:A18 not equal to 1 1)
00000h - FFFFFh (Default)
12M
16M
4M
1/4th of the array
1/2th of the array
3/4th of the array
Full array
C0000h - FFFFFh (A19 = A18 = 1)
80000h - FFFFFh (A19 = 1)
256K x 16
512K x 16
768K x 16
1M x 16
8M
40000h - FFFFFh (A19:A18 not equal to 00)
00000h - FFFFFh (Default)
12M
16M
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2007
Revision : 1.0 5/15