ESMT
M24L16161ZA
Pin Configuration[2, 3]
48-ball VFBGA
Top View
Product Portfolio Product
Power Dissipation
Operating ICC(mA)
VCC Range (V)
Product
Speed(ns)
70
Standby ISB2(µA)
f = 1MHz
f = fmax
Min.
2.2
Typ.[4]
3.0
Max
3.6
.Typ.[4] Max.
.Typ.[4]
18
Max
25
.Typ. [4]
55
Max
70
M24L16161ZA
3
5
only refresh certain portions of the memory in Standby Mode,
as configured by the user through the settings in the Variable
Address Register.
Low-Power Modes
At power-up, all four sections of the die are activated and
thePSRAM enters into its default state of full memory size
andrefresh space. This device provides three different
Low-Power Modes.
Once ZZ returns HIGH in this mode, the PSRAM goes back
to operating in full address refresh. Refer to “Variable Address
Space Register (VAR)” on page4 for the protocol to turn off
sections of the memory in Standby mode. If the VAR register
is not updated after power-up, the PSRAM will be in its default
state. In the default state the whole memory array will be
refreshed in Standby Mode. The 16-Mbit is divided into four
4-Mbit sections allowing certain sections to be active (i.e.,
refreshed).
1.Reduced Memory Size Operation
2.Partial Array Refresh
3.Deep Sleep Mode
4.Temperature Controlled Refresh
Reduced Memory Size Operation
In this mode, the 16-Mb PSRAM can be operated as a
12-Mbit,8-Mbit, and 4-Mbit memory block. Refer to “Variable
Address Space Register (VAR)” on page4 for the protocol to
turn on/off sections of the memory. The device remains in
RMS mode until changes to the Variable Address Space
register are made to revert back to a complete 16-Mbit
PSRAM.
Deep Sleep Mode
In this mode, the data integrity in the PSRAM is not
guaranteed. This mode can be used to lower the power
consumption of the PSRAM in an application. This mode can
be enabled and disabled through VAR similar to the RMS and
PAR mode. Deep Sleep Mode is activated by driving ZZ
Partial Array Refresh
LOW. The device stays in the deep sleep mode until ZZ is
driven HIGH.
The Partial Array Refresh mode allows customers to turn off
sections of the memory block in Standby mode (with ZZ tied
LOW) to reduce standby current. In this mode the PSRAM will
Notes:
2. Ball H6 and E3 can be used to upgrade to a 32M and a 64M density respectively.
3. NC “no connect” - not connected internally to the die.
4.Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC (typ)
and TA = 25°C. Tested initially and after any design changes that may affect the parameter.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jul. 2007
Revision : 1.0 3/15
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
