ESMT
M14D5121632A (2A)
Ordering Information:
Data Rate
Product ID
Max Freq.
VDD
Package
Comments
(CL-tRCD-tRP)
M14D5121632A -1.5BG2A
M14D5121632A -1.8BG2A
M14D5121632A -2.5BG2A
M14D5121632A -1.8BBG2A
M14D5121632A -2.5BBG2A
667MHz
533MHz
400MHz
533MHz
400MHz
1.8V
1.8V
1.8V
1.8V
1.8V
DDR2-1333 (7-10-10)
DDR2-1066 (7-7-7)
DDR2-800 (5-5-5)
DDR2-1066 (7-7-7)
DDR2-800 (5-5-5)
84 ball BGA
A(max) = 1.2mm
Pb-free
84 ball BGA
A(max) = 1.0mm
Functional Block Diagram
CLK
Clock
Generator
CLK
Bank D
Bank C
Bank B
Row
Address
Address
Buffer
&
Refresh
Counter
Mode Register &
Extended Mode
Register
Bank A
DQS, DQS
Sense Amplifier
Column Decoder
DM
Column
Address
Buffer
&
Refresh
Counter
CS
RAS
CAS
WE
Data Control Circuit
DQ
ODT
CLK, CLK
DLL
Elite Semiconductor Memory Technology Inc.
Publication Date : Oct. 2016
Revision : 1.0 2/64
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
