欢迎访问ic37.com |
会员登录 免费注册
发布采购

M12L64322A-5BG2U 参数 Datasheet PDF下载

M12L64322A-5BG2U图片预览
型号: M12L64322A-5BG2U
PDF下载: 下载PDF文件 查看货源
内容描述: 512K ×32位×4银行 [512K x 32 Bit x 4 Banks]
分类和应用:
文件页数/大小: 46 页 / 811 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
 浏览型号M12L64322A-5BG2U的Datasheet PDF文件第3页浏览型号M12L64322A-5BG2U的Datasheet PDF文件第4页浏览型号M12L64322A-5BG2U的Datasheet PDF文件第5页浏览型号M12L64322A-5BG2U的Datasheet PDF文件第6页浏览型号M12L64322A-5BG2U的Datasheet PDF文件第8页浏览型号M12L64322A-5BG2U的Datasheet PDF文件第9页浏览型号M12L64322A-5BG2U的Datasheet PDF文件第10页浏览型号M12L64322A-5BG2U的Datasheet PDF文件第11页  
ESMT  
M12L64322A (2U)  
AC CHARACTERISTICS (AC operating condition unless otherwise noted)  
-5  
-6  
-7  
Parameter  
Symbol  
Unit  
Note  
Min  
5
Max  
Min  
6
Max  
Min  
7
Max  
CAS latency = 3  
CLK cycle time  
tCC  
1000  
1000  
1000  
ns  
1
CAS latency = 2  
CAS latency = 3  
CAS latency = 2  
CAS latency = 3  
CAS latency = 2  
10  
10  
10  
CLK to valid  
4.5  
6
5.5  
6
6
6
tSAC  
ns  
ns  
1,2  
2
output delay  
Output data  
2
2
2
2
2
2
tOH  
hold time  
CLK high pulse width  
CLK low pulse width  
Input setup time  
Input hold time  
CLK to output in Low-Z  
tCH  
tCL  
2
2.5  
2.5  
1.5  
1
2.5  
2.5  
2
ns  
ns  
ns  
ns  
ns  
3
3
3
3
2
2
tSS  
tSH  
tSLZ  
1.5  
1
1
1
1
1
CLK to output  
in Hi-Z  
CAS latency = 3  
CAS latency = 2  
4.5  
6
5.5  
6
6
6
tSHZ  
ns  
Note:  
1. Parameters depend on programmed CAS latency.  
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.  
3. Assumed input rise and fall time (tr & tf) =1ns.  
If tr & tf is longer than 1ns, transient time compensation should be considered.  
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Apr. 2010  
Revision: 1.0 7/46